Texas Instruments TPS62869EVM-118 Скачать руководство пользователя страница 2

1 Introduction

The TPS62869 is a family of synchronous, step-down converter, coming in a 1.5-x2.5-x1.0-mm QFN package.

1.1 Performance Specification

Table 1-1

 provides a summary of the TPS62869EVM-118 performance specifications.

Table 1-1. Performance Specification Summary

SPECIFICATION

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input voltage

2.4

5

5.5

V

Output voltage setpoint

0.9

V

Output current

0

6000

mA

1.2 Modifications

The printed-circuit board (PCB) for this EVM is designed to accommodate the different adjustable output voltage 
versions of this integrated circuit (IC). On the EVM, additional input and output capacitors can be added.

2 Setup

This section describes how to properly use the TPS62869EVM-118.

2.1 Input/Output Connector Descriptions

J1, Pin 1 and 2 – VIN

Positive input connection from the input supply for the EVM

J1, Pin 3 and 4 – S+/S-

Input voltage sense connections. Measure the input voltage at this point.

J1, Pin 5 and 6 – GND

Input return connection from the input supply for the EVM

J2, Pin 1 and 2 – VOUT

Output voltage connection

J2, Pin 3 and 4 – S+/S-

Output voltage sense connections. Measure the output voltage at this point.

J2, Pin 5 and 6 – GND

Output return connection

J3, Pin 5 – VBUS 

The VBUS pin of this header is used to bias the SCL and SDA nodes of I²C interface 
via a resistor.

J3, Pin 6 – GND

The GND pin of this header is used to connect the grounds of the IC and the I²C 
interface.

J3, Pin 9 – SCL

The pin of this header should be connected to the SCL of the I²C interface.

J3, Pin 10 – SDA

The pin of this header should be connected to the SDA of the I²C interface.

JP1 – VID/PG

VID/ PG pin jumper. Place the jumper across VID/ PG and LOW pins before start-up. 
This sets the output voltage and device address. After startup, VOUT reflects the 
value set on V

OUT

 Register 1 if the jumper is placed across VID/ PG and LOW pins. 

VOUT follows the value set on V

OUT

 Register 2 if the jumper is placed across VID/ PG 

and HIGH pins.

JP2 – EN

EN pin input jumper. Place the jumper across ON and EN to turn on the IC. Place the 
jumper across OFF and EN to turn off the IC.

2.2 Hardware Setup

To operate the EVM, set jumpers JP1 and JP2 to the desired position per 

Section 2.1

. Connect the input supply 

to J1 and connect the load to J2.

Introduction

www.ti.com

2

TPS62869EVM-118 Evaluation Module

SLUUC88B – MARCH 2021 – REVISED NOVEMBER 2021

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Содержание TPS62869EVM-118

Страница 1: ...2 1 1 Performance Specification 2 1 2 Modifications 2 2 Setup 2 2 1 Input Output Connector Descriptions 2 2 2 Hardware Setup 2 3 TPS62869EVM 118 Test Results 3 4 Board Layout 3 5 Schematic and List of...

Страница 2: ...sure the output voltage at this point J2 Pin 5 and 6 GND Output return connection J3 Pin 5 VBUS The VBUS pin of this header is used to bias the SCL and SDA nodes of I C interface via a resistor J3 Pin...

Страница 3: ...his section provides the TPS62869EVM 118 board layout and illustrations in Figure 4 1 through Figure 4 7 The Gerbers are available on the EVM product page TPS62869EVM 118 Figure 4 1 Top Assembly Figur...

Страница 4: ...Figure 4 4 Signal Layer 2 Figure 4 5 Signal Layer 3 Board Layout www ti com 4 TPS62869EVM 118 Evaluation Module SLUUC88B MARCH 2021 REVISED NOVEMBER 2021 Submit Document Feedback Copyright 2021 Texas...

Страница 5: ...Signal Layer 4 Figure 4 7 Bottom Layer www ti com Board Layout SLUUC88B MARCH 2021 REVISED NOVEMBER 2021 Submit Document Feedback TPS62869EVM 118 Evaluation Module 5 Copyright 2021 Texas Instruments I...

Страница 6: ...2 Capacitor ceramic 22 F 6 3 V 20 X7R 0805 GRM21BZ70J226ME44L Murata C9 1 Capacitor Ceramic 47 F 6 3 V 20 X5R 0603 GRM188R60J476ME15D Murata C8 1 Capacitor tantalum 68 F 20 V 10 7343 T495D686K020ATE1...

Страница 7: ...ng the supplied 10 pin ribbon cable The connectors on the ribbon cable are keyed to prevent incorrect installation Figure 6 1 shows a quick adapter connection overview Figure 6 1 Quick Connection Over...

Страница 8: ...s Here single registers can be read or written to the device if applicable Refer to the register map in the TPS62869 2 4 V to 5 5 V Input 6 A Synchronous Step Down Converter Data Sheet for a detailed...

Страница 9: ...Revision B November 2021 Page Updated TPS628692 to TPS628682 1 Updated title from Setup to Hardware Setup 2 Changes from Revision May 2021 to Revision A March 2021 Page Updated TPS62869EVM 118 Schemat...

Страница 10: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 11: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 12: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 13: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 14: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 15: ...change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of thes...

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