
Power Dissipation
2-5
Test Setup and Results
2.3
Power Dissipation
The low junction-to-case thermal resistance of the PWP package, along with
a well designed board layout, allows the TPS54973EVM−017 EVM to output
full rated load current while maintaining safe junction temperatures. With a
3.3-V input source and a 9-A load, the junction temperature is approximately
60
°
C, while the case temperature is approximately 55
°
C. The total circuit
losses at 25
°
C are shown in Figure 2−3. Power dissipaton is shown for an input
voltage of 3.3 V. For additional information on the dissipation ratings of the
devices, see the individual product data sheets.
Figure 2−3. Measured Circuit Losses
0
0.5
1
1.5
2
2.5
3
3.5
4
0
1
2
3
4
5
6
7
8
9
10
− Power Dissipation − W
P
D
IO − Output Current − A
POWER DISSIPATION
vs
OUTPUT CURRENT
VI = 3.3 V
Содержание TPS54973EVM-017
Страница 1: ...E September 2003 PMP Systems Power User s Guide SLVU091...
Страница 6: ...iv...
Страница 29: ...Layout 3 3 Board Layout Figure 3 2 Internal Layer 2 Figure 3 3 Internal Layer 3...
Страница 30: ...Layout 3 4 Figure 3 4 Bottom Side Layout Figure 3 5 Top Side Assembly...
Страница 31: ...Layout 3 5 Board Layout Figure 3 6 Bottom Layer Assembly...