POE INPUT
ETHERNET DATA
42.5-57VDC
CHGND
CHGND
2
3
4
1
5
6
7
8
J3
2
3
4
1
5
6
7
8
J4
0.01µF
C26
0.01µF
C27
0.01µF
C28
0.01µF
C29
75.0
R32
75.0
R33
75.0
R34
75.0
R35
75.0
R28
75.0
R29
75.0
R30
75.0
R31
1000pF
C25
1000pF
C32
1000pF
C30
1000pF
C31
100 ohm
L3
100 ohm
L4
100 ohm
L5
100 ohm
L6
PAIR12
PAIR36
PAIR45
PAIR78
CHGND
D8
D9
D10
D11
D12
D13
D14
D15
1
2
3
4
J8
DNP
J9
DNP
J10
DNP
~BRG1
~BRG2
+BRG1
-BRG1
+BRG2
-BRG2
TP16
TP12
TP13
TP14
TP15
VSS2
VSS1
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1:1
1:1
1:1
1:1
T3
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Schematic
3
SLVUAG7A – May 2015 – Revised July 2017
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TPS2378EVM-602 Evaluation Module
4
Schematic
Figure 1. TPS2378EVM-602 PD Front-End Schematic