Texas Instruments TMS320TCI648 Series, Руководство пользователя

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Registers
6.11 VCP2 Endian Mode Register (VCPEND)
The VCP2 endian mode register (VCPEND) is shown in Figure 14 and described in Table 17 . VCPEND
has an effect only in big-endian mode.
Figure 14. VCP2 Endian Mode Register (VCPEND)
31 16
Reserved
R/W-0
15 8
Reserved
R/W-0
7 2 1 0
Reserved SD BM
R/W-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 17. VCP2 Endian Mode Register (VCPEND) Field Descriptions
Bit Field Value Description
31-2 Reserved 0 Reserved. The reserved bit location is always read as 0. A value written to this field has no effect.
1 SD Traceback soft-decision memory format select bit.
0 32-bit-word packed.
1 Native format (8 bits).
0 BM Branch metrics memory format select bit.
0 32-bit-word packed.
1 Native format (8 bits).
25 SPRUE09E – May 2006 – Revised December 2009 TMS320TCI648x/9x Viterbi-Decoder Coprocessor 2
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