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TMS320C6727, TMS320C6726, TMS320C6722
Floating-Point Digital Signal Processors
SPRS268E – MAY 2005 – REVISED JANUARY 2007
Table 2-12. Terminal Functions (continued)
GDH/
SIGNAL NAME
RFP
TYPE
(1)
PULL
(2)
GPIO
(3)
DESCRIPTION
ZDH
Universal Host-Port Interface (UHPI) Data and Control
UHPI_HD[0]
-
K13
IO
IPD
Y
UHPI_HD[1]
-
K14
IO
IPD
Y
UHPI_HD[2]
-
M14
IO
IPD
Y
UHPI_HD[3]
-
L13
IO
IPD
Y
UHPI_HD[4]
-
L14
IO
IPD
Y
UHPI_HD[5]
-
N13
IO
IPD
Y
UHPI_HD[6]
-
N14
IO
IPD
Y
UHPI_HD[7]
-
P14
IO
IPD
Y
UHPI Data Bus [Lower 16 Bits]
UHPI_HD[8]
-
E14
IO
IPD
Y
UHPI_HD[9]
-
F14
IO
IPD
Y
UHPI_HD[10]
-
F13
IO
IPD
Y
UHPI_HD[11]
-
G14
IO
IPD
Y
UHPI_HD[12]
-
G13
IO
IPD
Y
UHPI_HD[13]
-
H14
IO
IPD
Y
UHPI_HD[14]
-
H13
IO
IPD
Y
UHPI_HD[15]
-
J13
IO
IPD
Y
UHPI_HD[16]/HHWIL
-
H1
IO/I
IPD
Y
UHPI_HD[17]
-
G3
IO
IPD
Y
UHPI_HD[18]
-
G4
IO
IPD
Y
UHPI_HD[19]
-
F3
IO
IPD
Y
UHPI_HD[20]
-
F4
IO
IPD
Y
UHPI Data Bus [Upper 16 Bits (IO)] in the following
modes:
UHPI_HD[21]
-
E3
IO
IPD
Y
•
Fullword Multiplexed Address and Data
UHPI_HD[22]
-
D3
IO
IPD
Y
•
Fullword Non-Multiplexed
UHPI_HD[23]
-
C3
IO
IPD
Y
UHPI_HHWIL (I) on pin UHPI_HD[16]/HHWIL and GPIO
UHPI_HD[24]
-
P2
IO
IPD
Y
on other pins in the following mode:
UHPI_HD[25]
-
N2
IO
IPD
Y
•
Half-word Multiplexed Address and Data
UHPI_HD[26]
-
N3
IO
IPD
Y
In this mode, UHPI_HHWIL indicates whether the high or
low half-word is being addressed.
UHPI_HD[27]
-
M3
IO
IPD
Y
UHPI_HD[28]
-
L3
IO
IPD
Y
UHPI_HD[29]
-
L4
IO
IPD
Y
UHPI_HD[30]
-
L2
IO
IPD
Y
UHPI_HD[31]
-
H4
IO
IPD
Y
Universal Host-Port Interface (UHPI) Control
UHPI_HBE[0]
-
C6
I
IPD
Y
UHPI Byte Enable for UHPI_HD[7:0]
UHPI_HBE[1]
-
C5
I
IPD
Y
UHPI Byte Enable for UHPI_HD[15:8]
UHPI_HBE[2]
-
C4
I
IPD
Y
UHPI Byte Enable for UHPI_HD[23:16]
UHPI_HBE[3]
-
B2
I
IPD
Y
UHPI Byte Enable for UHPI_HD[31:24]
UHPI_HCNTL[0]
-
D9
I
IPD
Y
UHPI Control Inputs Select Access Mode
UHPI_HCNTL[1]
-
C10
I
IPD
Y
UHPI Host Address Strobe for Hosts with Multiplexed
UHPI_HAS
-
C9
I
IPD
Y
Address/Data bus
UHPI_HRW
-
D8
I
IPD
Y
UHPI Read/not Write Input
UHPI_HDS[1]
-
D7
I
IPU
Y
UHPI Select Signals which create the internal HSTROBE
active when:
UHPI_HDS[2]
-
C7
I
IPU
Y
(UHPI_HCS == '0') & (UHPI_HDS[1] != UHPI_HDS[2])
UHPI_HCS
-
C8
I
IPU
Y
UHPI_HRDY
-
D6
O
IPD
Y
UHPI Ready Output
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