Texas Instruments TMP112EVM, Руководство пользователя

Страница: 5 / 25

www.ti.com
TMP112EVM Hardware Setup
2.1 Theory of Operation for TMP112 Hardware
The TMP112EVM only requires the two-wire I
2
C lines (SDA and SCLK) and V
DUT
/GND to supply a
constant 3.3 V and power return, as shown in Figure 3 . The TMP112EVM also has test points to monitor
these signal lines and ground, in case users may want to use their own signals or verify successful I
2
C
communications.
Figure 3. TMP112EVM Board Block Diagram
2.2 Signal Definitions of H1 (10-Pin Male Connector Socket)
Table 3 shows the pin out for the 10-pin connector socket used to communicate between the
TMP112EVM and the SM-USB-DIG. Note that the TMP112EVM uses only the necessary I
2
C
communication lines (pins 1 and 3) and the V
DUT
and GND (pins 6 and 8, respectively) to issue commands
to the TMP112 sensors.
Table 3. Signal Definition of H1 on the TMP112EVM Board
Pin on U1 Signal Description
1 I2C_SCL I
2
C clock signal (SCL)
2 CTRL/MEAS4 GPIO: control output or measure
input
3 I2C_SDA1 I
2
C data signal (SDA)
4 CTRL/MEAS5 GPIO: control output or measure
input
5 SPI_DOUT1 SPI data output (MOSI)
6 V
DUT
Switchable DUT power supply: 3.3 V,
5 V, Hi-Z (disconnected)
(1)
7 SPI_CLK SPI clock signal (SCLK)
8 GND Power Return (GND)
9 SPI_CS1 SPI chip-select signal (CS)
10 SPI_DIN1 SPI data input (MISO)
(1)
When V
DUT
is Hi-Z, all digital I/O are Hi-Z as well.
5 SBOU144 – August 2014 TMP112EVM Evaluation Board and Software Tutorial
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated