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Schematic, Bill of Materials, and Layout

7

SNVU704 – February 2020

Submit Documentation Feedback

Copyright © 2020, Texas Instruments Incorporated

TLV840EVM Voltage Supervisor User Guide

2.3

Layout and Component Placement

Figure 4

and

Figure 5

show the top and bottom assemblies of the printed circuit board (PCB) to show the

component placement on the EVM.

Figure 6

and

Figure 7

show the top and bottom layouts,

Figure 8

and

Figure 9

show the top and bottom

layers, and

Figure 10

shows the top solder mask of the EVM.

Figure 4. Component Placement—Top Assembly

Figure 5. Component Placement—Bottom Assembly

Figure 6. Layout—Top

Figure 7. Layout—Bottom

Содержание TLV840EVM

Страница 1: ...peration 10 4 1 Input Power VDD 10 4 2 Monitoring Voltage on VDD 10 4 3 Reset Output RESET 11 4 4 Reset Time Delay Programming Program tD via CT 11 List of Figures 1 TLV840EVM Board Top 3 2 TLV840EVM...

Страница 2: ...2 SNVU704 February 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated TLV840EVM Voltage Supervisor User Guide Trademarks All trademarks are the property of their respect...

Страница 3: ...X or TLV840PHXX the shunt on J2 must be removed as push pull devices do not use a pull up resistor so R1 must be disconnected If using TLV840EVM with the active high variant TLV840PHXX the active low...

Страница 4: ...Power Ultra Low Voltage Supervisor with Ajustable Reset Time Delay data sheet SBVSBC3 1 2 TLV840 Applications Motor Drives Factory Automation and Control Home Theater and Entertainment Electronic Poin...

Страница 5: ...Bill of Materials and Layout 5 SNVU704 February 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated TLV840EVM Voltage Supervisor User Guide 2 1 TLV840EVM Schematic Figure...

Страница 6: ...4 Bumpon Hemisphere 0 44 X 0 20 Clear Transparent Bumpon SJ 5303 CLEAR 3M J1 J2 J3 J5 J6 5 Header 100mil 2x1 TH Header 2x1 100mil TH 800 10 002 10 001000 Mill Max J4 1 Header 100mil 3x1 TH Header 3x1...

Страница 7: ...t Figure 4 and Figure 5 show the top and bottom assemblies of the printed circuit board PCB to show the component placement on the EVM Figure 6 and Figure 7 show the top and bottom layouts Figure 8 an...

Страница 8: ...and Layout www ti com 8 SNVU704 February 2020 Submit Documentation Feedback Copyright 2020 Texas Instruments Incorporated TLV840EVM Voltage Supervisor User Guide Figure 8 Top Layer Figure 9 Bottom Lay...

Страница 9: ...o GND pin Allows user to connect to the ground plane 3 2 EVM Jumpers Table 3 lists the jumpers on the TLV840EVM As ordered the EVM will have five jumpers installed Table 3 List of Onboard Jumpers JUMP...

Страница 10: ...ts to logic high Pin 1 of jumper J6 can also be connected to a control signal to set the logic level on MR pin If pin 1 on jumper J6 is logic low the device asserts a reset There is also a test point...

Страница 11: ...RESET time delay connect CT pin to a capacitor to GND or leave CT pin floating The reset time delay can be set to a minimum value of 80 s by leaving the CT pin floating or a maximum value of approxim...

Страница 12: ...mper on pin 2 middle pin and pin 3 right pin of jumper J4 to connect CT to delay capacitor C3 This connects the CT pin to a 0 01 F capacitor to set the RESET delay tD to 6 2 ms as shown in Figure 15 B...

Страница 13: ...ther than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control tec...

Страница 14: ...These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not in...

Страница 15: ...instructions set forth by Radio Law of Japan which includes but is not limited to the instructions below with respect to EVMs which for the avoidance of doubt are stated strictly for convenience and s...

Страница 16: ...any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electr...

Страница 17: ...R DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthe...

Страница 18: ...e resources are subject to change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reprod...

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