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VDD
RESET
Reset Delay (t
D
)= 57.6 µs
VDD
RESET
Reset Delay (t
D
)= 5.42 ms
VDD
RESET
Reset Delay (t
D
)= 56.8 ms
Revision History
12
SNVU704 – February 2020
Copyright © 2020, Texas Instruments Incorporated
Revision History
The EVM provides the jumper J4 to configure the CT pin and test point TP2 to monitor the CT pin. Place a
shunt jumper on pin 1 (left pin) and pin 2 (middle pin) of jumper J4 to connect CT to delay capacitor C2.
This connects the CT pin to a 0.1-µF capacitor to set the RESET delay (t
D
) to ~61.9 ms as shown in
. Or place a shunt jumper on pin 2 (middle pin) and pin 3 (right pin) of jumper J4 to connect CT
to delay capacitor C3. This connects the CT pin to a 0.01-µF capacitor to set the RESET delay (t
D
) to ~6.2
ms as shown in
. By removing the shunt jumper from jumper J4, the RESET time delay defaults
to the minimum value of 40 µs.
shows the actual delay with no capacitor may be shorter than
the typical value of 40 µs. If using a different delay capacitor, the capacitor must be
≥
100pF to be
recognized.
Figure 14. TLV840EVM RESET Delay Time (t
D
) with C
T
Tied to GND Through 0.1-µF Capacitor
Figure 15. TLV840EVM RESET Delay Time (t
D
) with C
T
Tied to GND Through 0.01-µF Capacitor
Figure 16. TLV840EVM RESET Delay Time (t
D
) with C
T
Floating
Revision History
DATE
REVISION
NOTES
February 2020
*
Initial Release