Controller Area Network (CAN)
Prototype:
void
ROM_CANIntEnable(uint32_t ui32Base,
uint32_t ui32IntFlags)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_CANTABLE
is an array of pointers located at
ROM_APITABLE[18]
.
ROM_CANIntEnable
is a function pointer located at
ROM_CANTABLE[10]
.
Parameters:
ui32Base
is the base address of the CAN controller.
ui32IntFlags
is the bit mask of the interrupt sources to be enabled.
Description:
Enables specific interrupt sources of the CAN controller. Only enabled sources will cause a
processor interrupt.
The
ui32IntFlags
parameter is the logical OR of any of the following:
CAN_INT_ERROR
- a controller error condition has occurred
CAN_INT_STATUS
- a message transfer has completed, or a bus error has been detected
CAN_INT_MASTER
- allow CAN controller to generate interrupts
In order to generate any interrupts,
CAN_INT_MASTER
must be enabled. Further, for any
particular transaction from a message object to generate an interrupt, that message object
must have interrupts enabled (see
CAN_INT_ERROR
will generate
an interrupt if the controller enters the “bus off” condition, or if the error counters reach a limit.
CAN_INT_STATUS
will generate an interrupt under quite a few status conditions and may
provide more interrupts than the application needs to handle. When an interrupt occurs, use
to determine the cause.
Returns:
None.
6.2.1.11 ROM_CANIntStatus
Returns the current CAN controller interrupt status.
Prototype:
uint32_t
ROM_CANIntStatus(uint32_t ui32Base,
tCANIntStsReg eIntStsReg)
ROM Location:
ROM_APITABLE
is an array of pointers located at
0x0100.0010
.
ROM_CANTABLE
is an array of pointers located at
ROM_APITABLE[18]
.
ROM_CANIntStatus
is a function pointer located at
ROM_CANTABLE[12]
.
Parameters:
ui32Base
is the base address of the CAN controller.
eIntStsReg
indicates which interrupt status register to read
April 8, 2013
61
Содержание Tiva TM4C123GH6PM
Страница 26: ...Boot Loader 26 April 8 2013...
Страница 68: ...Controller Area Network CAN 68 April 8 2013...
Страница 122: ...Hibernation Module 122 April 8 2013...
Страница 136: ...Inter Integrated Circuit I2C 136 April 8 2013...
Страница 152: ...Memory Protection Unit MPU 152 April 8 2013...
Страница 174: ...Pulse Width Modulator PWM Returns None 174 April 8 2013...
Страница 196: ...Synchronous Serial Interface SSI 196 April 8 2013...
Страница 222: ...System Control 222 April 8 2013...
Страница 270: ...UART 270 April 8 2013...
Страница 296: ...uDMA Controller 296 April 8 2013...
Страница 351: ...April 8 2013 351...