Texas Instruments Stellaris LM3S9D90, Руководство пользователя

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Hardware Description
14 July 5, 2011
In-Circuit Debug Interface Board
The ICDI board is used to download and debug programs on the EK-LM3S9D90 evaluation board,
but can also be used for debug of other Stellaris boards. A block diagram is shown in Figure 2-5.
Figure 2-5. In Circuit Debug (ICDI) Board Block Diagram
Functional Description
USB to JTAG/SWD, Power (Schematic page 22)
USB
An FTDI USB to serial protocol chip is used for the USB 2.0 full-speed device controller. This is
connected to a USB miniB connector and to a set of buffers/multiplexers. A 1-kbit serial EEPROM
contains USB configuration data which is read at power up.
Power
The board receives 5 V power from the USB bus. A DC regulator generates 3.3 V for on-board
circuits, when on LED D1 (POWER) is lit on.
Headers
Three headers are on-board, a 10-pin JTAG/SWD header J1, an 8-pin PWR/UART header J2, and
an optional 20-pin JTAG/SWD header J3. The 10-pin and 8-pin headers are used to connect to the
EK-LM3S9D90 evaluation board.
JTAG/SWD
JTAG/SWD connector J1 connects to the EK-LM3S9D90 evaluation board with a ribbon cable for
program download and debug. This is a 2x5 fine pitch (0.050”) ARM JTAG connector, see
(Figure 2-6) for signal definition.The ICDI supports JTAG debug, SWD (Serial Wire Debug), and
SWO (Serial Wire Out) trace with this connector.
Optional JTAG/SWD connector J3 is a 2x10 standard pitch (0.1”) ARM JTAG connector directly
connected to J1, see (Figure 2-7) for signal definition. This allows the ICDI to connect to targets
that use a 2x10 connector. It also allows the use of an external 2x10 debugger on targets with the
fine pitch connector, including the EK-LM3S9D90. The signal direction shown for J1 and J3
FTDI
PortA
3.3V
Regulator
USB
RESET
VBUS
6MHz
OSC
JTAG/SWD
PWR /UART
JTAG/SWD
MUX
EEPROM
PortB
POWER
2x4
2x10
JTAG/SWD
2x5
ACTIVE
DEBUG
USB