Texas Instruments PCM4222EVM, Руководство пользователя

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2.7.2 Audio Serial Port
Hardware Configuration
For PCM mode, the audio data may be output via the audio serial port, which is buffered and routed to
header J6. The audio serial port header pin configuration is shown in
Table 7 . The BCK and LRCK clocks
may be outputs or inputs, depending upon the Master or Slave mode configuration of the port
Table 7. Audio Serial Port Header Configuration
Header J6 Pin Number Audio Serial Port Signal Name, Description
1 SCKO, System Clock Output (same as PCM4222 MCKI clock)
3 BCK, Audio Data Bit Clock Input or Output
5 LRCK, Audio Left/Right Word Clock Input or Output
7 DATA, PCM Audio Data Output
2,4,6,8,9,10 Ground
In Master mode, the BCK and LRCK clocks are output pins, and are derived from the PCM4222 MCKI
clock input (pin 35). The BCK clock rate depends on the audio data format selection. The LRCK clock rate
is always equal to the output sampling rate. In Slave mode, the BCK and LRCK clocks are input pins,
sourced from an external audio serial port master, such as a digital signal processor serial port, a serial
timing generator, or a programmable logic device. Once again, the LRCK clock rate is always equal to the
desired output sampling rate. The BCK clock rate depends on the audio data format selected. Refer to the
PCM4222 datasheet for audio serial port operational details.
The Slave/Master mode operation is determined by the state of the S/M input (pin 39), which is controlled
via the S/M element on switch SW3.
Table 8 summarizes the operation of the S/M switch.
Table 8. Audio Serial Port Slave/Master Mode Selection
Switch SW3, S/M Slave or Master Mode
LO Master
HI Slave
The audio data format is selected using the FMT0 and FMT1 inputs (pins 44 and 43, respectively), which
are controlled by the FMT0 and FMT1 elements on switch SW3.
Table 9 summarizes the operation for the
FMT0 and FMT1 switches.
Table 9. Audio Serial Port Data Format Selection
Switch SW3, FMT1 Switch SW3, FMT0 Audio Data Format
LO LO Left Justified
LO HI I
2
S
HI LO TDM
HI HI TDM with One BCK Period Delay
SBAU124 – December 2006 PCM4222EVM User's Guide 11
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