Interfacing With the EVM
3
SBAU349 – June 2020
Copyright © 2020, Texas Instruments Incorporated
PCM1808 Evaluation Module
Table 3. PCM1808 Format Settings
FMT
Format
0
I2S, 24bit
1
Left-justified, 24 bit
All hardware pins are tied low by default, placing the device in slave mode and I2S, 24-bit audio format.
For more information on the operating modes and clock timing of the PCM1808 device, see the
Single-Ended, Analog-Input 24-Bit, 96-kHz Stereo ADC Data Sheet
.
4
Interfacing With the EVM
4.1
PCM1808EVM Inputs
The right and left audio inputs to the PCM1808EVM can be applied through the RCA connectors (J9 and
J10, respectively) or directly to the test points (TP4 and TP5, respectively). The single-ended audio inputs
pass through an optional anti-aliasing filter made by R9 and C8 for the right input and R10 and C10 for the
left input. The capacitors can be left de-populated and the resistors replaced with 0-
Ω
resistors if the filter
is not desired. An input high-pass filter is created by the 1-µF capacitors (C1 and C9) and 60-k
Ω
input
impedance.
4.2
PCM1808EVM Output
The digital I/O of the PCM1808EVM are provided by J1 through J4; the functions are outlined in
The first two pins of each header are duplicated signals to allow for signal input and monitoring. The third
pin of each is connected to GND.