Public Version
www.ti.com
PRCM Register Manual
Bits
Field Name
Description
Type
Reset
9
ERRORGENERATORENABLE
Error generator module enable
RW
0x0
0x0: Disable error generator module
0x1: Enable error generator module
8
MINMAXAVGENABLE
Min/Max/Avg detector module enable
RW
0x0
0x0: Disable min max avg detector module
0x1: Enable min max avg detector module
7:2
RESERVED
Reserved
RW
0x00
1
SENNENABLE
Enable/disable SenN sensor
RW
0x1
0x0: Disable SenN sensor
0x1: Enable SenN sensor
0
SENPENABLE
Enable/disable SenP sensor
RW
0x0
0x0: Disable SenP sensor
0x1: Enable SenP sensor
Table 3-540. Register Call Summary for Register SRCONFIG
PRCM Functional Description
•
:
[0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10]
PRCM Basic Programming Model
•
SmartReflex Module Initialization Basic Programming Model
[11] [12] [13] [14] [15] [16] [17] [18]
•
Changing OPP Using the SmartReflex Module
•
Changing OPP Using Only the Voltage Processor Module
:
PRCM Use Cases and Tips
•
Device SmartReflex Initialization
:
[23] [24] [25] [26] [27] [28] [29] [30]
•
:
•
:
PRCM Register Manual
•
:
Table 3-541. SRSTATUS
Address Offset
0x0000 0004
Physical Address
0x480C 9004
Instance
SR1
0x480C B004
SR2
Description
This register contains status bits that indicate that the values in the register are valid or events have
occured
Type
R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
RESERVED
AVGERRVALID
MINMAXAVGVALID
MINMAXAVGACCUMVALID
ERRORGENERATORVALID
663
SWPU177N – December 2009 – Revised November 2010
Power, Reset, and Clock Management
Copyright © 2009–2010, Texas Instruments Incorporated
Содержание OMAP36 Series
Страница 174: ...174 List of Tables SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 692: ...692 MPU Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1084: ...1084 IVA2 2 Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 1990: ...1990 2D 3D Graphics Accelerator SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2334: ...2334 Memory Subsystem SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2700: ...2700 Memory Management Units SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2868: ...2868 HDQ 1 Wire SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 2974: ...2974 UART IrDA CIR SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3054: ...3054 Multichannel SPI SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3462: ...3462 MMC SD SDIO Card Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3508: ...3508 General Purpose Interface SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3584: ...3584 Initialization SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...
Страница 3648: ...3648 Debug and Emulation SWPU177N December 2009 Revised November 2010 Copyright 2009 2010 Texas Instruments Incorporated ...