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UART/IrDA/CIR Register Manual
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31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED
RESERVED
OE_ERROR
CRC_ERROR
ABORT_DETECT
FRAME_TOO_LONG_ERROR
Bits Field Name Description Type Reset
31:5 Reserved Read returns 0. R 0x00
4 OE_ERROR R -
0x1: Overrun error in RX FIFO when frame at top of
RX FIFO was received. Top of RX FIFO = next
frame to be read from RX FIFO.
3 FTL_ERROR Frame-too-long error R -
0x1: Frame-length too long error in frame at top of RX
FIFO
2 ABORT_DETECT R -
0x1: Abort pattern detected in frame at top of RX FIFO
0x1: CRC error in frame at top of RX FIFO
1 CRC_ERROR R -
0 Reserved Read returns 0. R 0
Table 19-86. Register Call Summary for Register SFLSR_REG
UART/IrDA/CIR Functional Description
• FIFO Management : [0]
• Register Access Modes : [1] [2] [3]
• UART/IrDA (SIR, MIR, FIR)/CIR Mode Selection : [4] [5] [6]
• IrDA Mode (UART3 Only) : [7] [8]
UART/IrDA/CIR Register Manual
• UART/IrDA/CIR Register Summary : [9] [10]
• UART/IrDA/CIR Register Description : [11] [12]
Table 19-87. RESUME_REG
Address Offset 0x02C
Physical Address
See Table 19-39 to Table 19-40
Description IR-IrDA and IR-CIR modes only
This register is used to clear internal flags, which halt transmission/reception when an underrun/overrun error
occurs. Reading this register resumes the halted operation. This register does not physically exist and always
reads as 0x00.
Type R
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED RESUME
Bits Field Name Description Type Reset
31:8 Reserved Read returns 0x00 R 0x000000
7:0 RESUME Dummy read to restart the TX or RX R 0x00
2956 UART/IrDA/CIR SWPU177N – December 2009 – Revised November 2010
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