Texas Instruments OMAP36 Series, Техническое справочное руководство

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Display Subsystem Register Manual
Table 7-424. DSI_VCn_LONG_PACKET_HEADER
Address Offset 0x0000 0108+ (n* 0x20) Index n = 0 to 3
Physical Address 0x4804 FD08+ (n* 0x20) Instance DSI_PROTOCOL_ENGINE
Description LONG PACKET HEADER INFORMATION - virtual channel. This register sets the 32-bit D
Word count + ECC. The ECC is computed if ECC_TX_EN is set to 1.
DATA_ID is located at bit[7:0].
WC is located at bit[23:8].
ECC is located at bit[31:24] (least-significant byte first and least significant bit first).
Type W
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
HEADER
Bits Field Name Description Type Reset
31:0 HEADER Packet header information: DATA ID + DATA FIELD +ECC W 0x00000000
Table 7-425. Register Call Summary for Register DSI_VCn_LONG_PACKET_HEADER
Display Subsystem Environment
• Video Port Used on Command Mode : [0] [1]
• Virtual Channel ID - VC Field, DI[7:6] : [2]
Display Subsystem Functional Description
• Video Mode : [3]
• Command Mode : [4] [5] [6] [7] [8] [9]
• Bus Turnaround : [10]
• Tearing Effect : [11] [12] [13]
Display Subsystem Basic Programming Model
• Global Register Controls : [14]
• Virtual Channels : [15]
• Packets : [16] [17] [18] [19] [20] [21]
• Video Mode : [22] [23]
• Command Mode TX FIFO : [24] [25] [26] [27] [28] [29]
• Command Mode RX FIFO : [30]
• Command Mode DMA Requests : [31]
• Command Mode Transfer Example 1 : [32] [33] [34]
• Command Mode Transfer Example 2 : [35]
Display Subsystem Register Manual
• Display Subsystem Register Manual : [36]
• DSI Protocol Engine Register Mapping Summary : [37]
• DSI Protocol Engine Registers : [38] [39]
1947 SWPU177N – December 2009 – Revised November 2010 Display Subsystem
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