Texas Instruments OMAP36 Series, Техническое справочное руководство

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Display Subsystem Register Manual
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Table 7-422. DSI_VCn_TE
Address Offset 0x0000 0104+ (n* 0x20) Index n = 0 to 3
Physical Address 0x4804 FD04+ (n* 0x20) Instance DSI_PROTOCOL_ENGINE
Description CONTROL REGISTER - Virtual channel This register controls the tearing effect logic. It defines the size
of the transfer when TE occurs and enables the automatic TE mode.
Type RW
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RESERVED TE_SIZE
TE_EN
TE_START
Bits Field Name Description Type Reset
31 TE_START Manual control of the start of the transfer. Users can use the TE RW 0
interrupt to determine that the TE trigger has been received before
setting the TE_START bit field. It is not mandatory to use the TE
interrupt.
0x0: Indicates the end of the transfer. The bit can be used to cancel
the transfer if not already started. The FIFO must be flushed by
software to ensure it contains no remaining data.
0x1: Starts the transfer of the data. The size is defined in TE_SIZE.
The bit field is set until the transfer completes. It is reset by hardware
when the transfer completes.
30 TE_EN Tearing effect control RW 0
0x0: Disables the automatic transfer of the data using the TE trigger
as a synchronization event. The interruption is used to know when
the TE trigger is received. The hardware resets the bit field when the
transfer completes(TE_SIZE=0).
0x1: Enables the automatic transfer of the data using the TE trigger
as a synchronization event.
29:24 RESERVED Write 0s for future compatibility. RW 0x0000
Reads returns 0.
23:0 TE_SIZE Defines the number of bytes (payload data excluding the check-sum) RW 0x000000
to be sent. Users must perform the write into the
DSI_VCn_LONG_PACKET_HEADER register before sending data
from the DSI_VCn_LONG_PACKET_PAYLOAD register. The register
value is decremented for every byte of the DSI link that is sent. At the
end of the transfer (TE_SIZE = 0), the TE_EN bit field is reset by
hardware. The DMA_request is asserted when the trigger is received
in order to receive data in the TX FIFO. It must not be used until all
data (TE_SIZE) have been received in the FIFO.
Table 7-423. Register Call Summary for Register DSI_VCn_TE
Display Subsystem Functional Description
• Tearing Effect : [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
Display Subsystem Register Manual
• DSI Protocol Engine Register Mapping Summary : [14]
• DSI Protocol Engine Registers : [15] [16]
1946 Display Subsystem SWPU177N – December 2009 – Revised November 2010
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