Texas Instruments MSP430F6735A, Руководство пользователя

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Function Indirect addressing mode with the Program Counter as the source register may produce
unexpected results
Description When using the indirect addressing mode in an instruction with the Program Counter (PC)
as the source operand, the instruction that follows immediately does not get executed.
For example in the code below, the ADD instruction does not get executed.
mov @PC, R7
add #1h, R4
Workaround Refer to the table below for compiler-specific fix implementation information.
IDE/Compiler Version Number Notes
IAR Embedded Workbench Not affected
TI MSP430 Compiler Tools (Code
Composer Studio)
v4.0.x or later
User is required to add the compiler
or assembler flag option below. --
silicon_errata=CPU22
MSP430 GNU Compiler (MSP430-
GCC)
MSP430-GCC 4.9 build 167 or later
CPU36
CPU Module
Category
Functional
Function PC corruption when single-stepping through flash erase
Description When single-stepping over code that initiates an INFOD Flash memory erase, the
program counter is corrupted.
Workaround None.
NOTE: This erratum applies to debug mode only.
CPU40
CPU Module
Category
Compiler-Fixed
Function PC is corrupted when executing jump/conditional jump instruction that is followed by
instruction with PC as destination register or a data section
Description If the value at the memory location immediately following a jump/conditional jump
instruction is 0X40h or 0X50h (where X = don't care), which could either be an instruction
opcode (for instructions like RRCM, RRAM, RLAM, RRUM) with PC as destination
register or a data section (const data in flash memory or data variable in
RAM), then the PC value is auto-incremented by 2 after the jump instruction is executed;
therefore, branching to a wrong address location in code and leading to wrong program
execution.
For example, a conditional jump instruction followed by data section (0140h).
@0x8012 Loop DEC.W R6
@0x8014 DEC.W R7
www.ti.com Advisory Descriptions
SLAZ647S – FEBRUARY 2015 – REVISED MAY 2021
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