Texas Instruments LP87745-Q1, Руководство пользователя

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Table 3-2. Configuration Jumpers (continued)
Jumper/Connector Number Jumper/Connector Name Configuration Description
J5 3V3_USB
Open (Default)
Either option from J4 must be
used.
Closed
PMIC input supply (PVIN_3V3) is
generated from USB supply.
J4 jumpers must be open if this
jumper is closed.
J6 EN_LVPMIC
Option 1: Open (Default)
PMIC Enable signal from 3.3 V
Input. J3 must be closed
Option 2: Pins 1 and 2 PMIC Enable signal path from
GUI interface. J3 must be open if
this Option is used
Option 3: Pins 2 and 3
PMIC Enable signal path from
pre-regulator PGOOD signal. J3
must be open if this Option is
used
J8 VIO_SEL
Pins 1 and 2
3.3 V supply generated from USB
supply
Pins 2 and 3 (Default)
3.3 V VIO supply generated from
PMIC VIO_LDO
J9 SYNCCLKIN Pins 1 and 2
SYNCCLKIN pin connected to
MCU clock port (used for testing
external clock input signal)
J10 VMON1_SEL
Pins 1 and 2 (Default: open)
VMON1 reference voltage
generated from voltage divider on
VIO supply
Pins 2 and 3 (Default: open)
VMON1 voltage taken from
BUCK1 (1.8 V) output
J12 nRSTOUT
Pins 1 and 2 (Default)
Connects PMIC nRSTOUT signal
to MCU port directly
Pins 2 and 3
Connects PMIC nRSTOUT signal
to MCU port through level shifter
(series resistors must be mounted
if this option is used)
J13 VMON1_GPO1
Pins 1 and 2 (Default: open)
Connects PMIC VMON1 signal to
MCU port directly
Pins 2 and 3 (Default: open)
Connects PMIC VMON1 signal
to MCU port through level shifter
(series resistors must be mounted
if this option is used)
J14 nINT
Pins 1 and 2 (Default)
Connects PMIC nINT signal to
MCU port directly
Pins 2 and 3
Connects PMIC nINT signal to
MCU port through level shifter
(series resistors must be mounted
if this option is used)
www.ti.com Jumpers and connectors
SNVU769A – SEPTEMBER 2021 – REVISED OCTOBER 2022
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LP877451Q1EVM Evaluation Module 5
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