Texas Instruments LP876242-Q1, Руководство пользователя

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2.1 The GUI Tool
Texas Instruments provides a GUI tool to enable, configure, and evaluate the various features of the LP876242-
Q1 with the EVM. Please refer to the GUI User's Guide
SLVUBT8 for a more detailed description of this tool.
The GUI runs on most PC platforms and requires an available USB port. The EVM USB connector is type-C and
a type-A to type-C cable is provided with the EVM to connect to the host computer. The EVM enumerates as two
COM ports and one additional port for the device firmware updates. The GUI uses ACCtrl COM port which can
be found from the device manager of the operating system. The COM port can be changed from the GUI from
Options—Device Settings menu.
A tool for estimating the efficiency of LP876242-Q1 device is also available called PMIC Efficiency Estimator
Tool. The tool can be accessed
here .
3 EVM Details
The following sections describe the various interfaces for measuring and controlling the configuration. Note: the
configurations are in coordination with the settings of the PMIC. It is important to understand that both the EVM
configuration and the settings of the PMIC must match. The communication interface can be easily changed
using the jumpers on J18 and J24. Please refer to the GUI User's Guide
SLVUBT8 on how to update the PMIC
communication protocol.
3.1 Terminal Blocks
The terminal blocks are simple push and release terminals which can accommodate wire sizes up to 14 AWG.
Table 3-1 lists the terminal blocks found around the perimeter of the EVM. J7, VCCA, is the input voltage for the
regulators. The rest of the terminal blocks are for the BUCK outputs.
Table 3-1. Terminal Blocks
Terminal Designator Description
VCCA J7 All Regulator Input, 2.8 V to 5.5 V Range
BUCK1 J8 Buck 1 Output, 2 A Capable
BUCK2 J10 Buck 2 Output, 4 A Capable
BUCK3 J12 Buck 3 Output, 3 A Capable
BUCK4 J14 Buck 4 Output, 3 A Capable
3.2 Test Point Descriptions
Numerous test points are provided to access voltages and signals. Test points marked with _S are designed for
sensing voltages only and are not designed to carry large DC currents.
Table 3-2. Test Point Descriptions
Test Point Device Pin Description
TP1 VCCA_S VCCA voltage sense point. Routed from
close to the VCCA pin of the LP876242-Q1.
TP2, TP4, TP6, TP7, TP9, TP12, TP15 GND_S Ground sense points routed from various
locations.
TP3 VOUT_LDO_S Voltage sense point for the internal LDO
output voltage.
TP5 VIO_S VIO voltage sense routed from the VIO pin of
the LP876242-Q1.
TP8, TP10, TP11, TP13, TP14, TP16 GND Solid ground points. Are able to carry larger
DC currents.
J20,J21,J25,J26 FB_B1,FB_B2,FB_B3,FB_B4 Buck output voltage sense points.
3.3 Configuration Headers
There are four headers available to configure the EVM function. Header J18, as shown in the silk screen picture
in
Figure 3-1 , is used to configure the EVM to match the settings written to the LP876242-Q1 configuration
Getting Started www.ti.com
4 LP876242-Q1 Evaluation Module SLVUC20A – MARCH 2021 – REVISED AUGUST 2022
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