2
SNAU235 – May 2018
Copyright © 2018, Texas Instruments Incorporated
LMX2572LPEVM Evaluation Instructions
8
Phase Adjustment
...........................................................................................................
9
Calibration-Free Automatic Ramp Setting
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10
Calibration-Free Automatic Ramp (CHDIV = 4)
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11
Automatic Ramp Setting
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12
Automatic Ramp (CHDIV = 4)
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13
FSK SPI FAST Mode Setting
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14
FSK SPI FAST Mode
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15
Readback Setting
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16
Register Readback
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17
LMX2572LPEVM Schematic (Page 1)
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18
LMX2572LPEVM Schematic (Page 2)
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19
PCB Layer Stack-Up
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20
Top Layer
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21
GND Layer
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22
Power Layer
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23
Bottom Layer
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24
Troubleshooting Guide
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25
Output Termination Schematic
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26
Default Output Phase Nosie
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27
Default Output Waveform
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28
Firmware Requirement
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29
Firmware Loader
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30
BSL Button
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31
Update Firmware
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32
Firmware Update Complete
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33
USB Communications
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List of Tables
1
Loop Filter Configuration
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2
Phase Adjustment Setting
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3
Calibration-free Automatic Ramp Example
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4
Automatic Ramp Example
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5
FSK SPI FAST Mode Example
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6
Bill of Materials
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7
Reference Clock Input Configuration
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8
Reference PRO Output Frequency Selection
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9
Reference PRO Output Format Selection
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10
Output Termination Configuration
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