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3.5.4 APLL Reference Options
The LMK5B33216 APLLs may accept any other APLL output as a reference instead of the XO. The BAW
on APLL3 provides a good option for a high-frequency cascaded APLL reference.
Figure 6-2 shows how to
configure the APLL reference to be cascaded from another APLL.
3.6 Reference Clock Inputs
The LMK5B33216 has two DPLL reference clock input pairs (IN0_P/N and IN1_P/N) with configurable input
priority and input selection modes. The inputs have programmable input type, termination, and biasing options to
support any clock interface type.
External LVCMOS or Differential reference clock inputs can be applied to the SMA ports, labeled IN0_P/N and
IN1_P/N. All SMA inputs are routed through 50-Ω single-ended traces and DC-coupled to the corresponding
IN0_P/N and IN1_P/N pins of the LMK5B33216. Single-ended signals should be connected to the noninverting
input, IN0_P or IN1_P. EVM default intends IN0 for single-ended input as the IN0_N SMA connector is not
populated.
3.7 Clock Outputs
The LMK5B33216 has 16 clock output pairs (OUT[0:15]_P/N).
OUT0 is configured as DC-coupled for LVCMOS evaluation purposes. OUT1, OUT2, and OUT3 have 50 Ω to
GND followed by an AC-coupling capacitor for HCSL evaluation purposes.OUT4 to OUT15 are AC-coupled to
the SMA ports for LVDS and HSDS evaluation purposes.
WARNING
DC-coupled clocks should not be directly connected to RF equipment which cannot accept DC
voltage greater than 0 V. For example, spectrum analyzers and phase noise analyzers.
3.8 Status Outputs and LEDS
Status outputs signals can be configured on the GPIO0, GPIO1, and GPIO2 pins. The status output types are
3.3-V LVCMOS or NMOS open-drain.
3.9 Requirements for Making Measurements
When performing measurements with the LMK5B33216EVM, the following procedures must be completed:
1. Ensure all required outputs have proper termination components installed to match the desired output types.
Figure 3-10 shows the recommended output terminations for each output format.
LMK5B33216
Output Driver
Oscilloscope
Internal input biasing
R
B
R
B
Driver
LVDS
HSDS
HCSL
R
B
(Ω)
open
open
50
Figure 3-10. Output Termination Recommendations
1. Ensure all enabled outputs that are not connected to any test equipment have a 50-Ω SMA termination.
Figure 3-11 shows an example of a 50 Ω SMA termination.
Figure 3-11. 50-Ω SMA Termination
www.ti.com EVM Configuration
SNAU263A – FEBRUARY 2022 – REVISED JULY 2022
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LMK5B33216EVM User's Guide 13
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