2 Introduction
The LMG352XEVM-04X operates as a half-bridge daughter card that can be either part of a larger custom
designed system or paired with the mother board. TI provides two mother boards (LMG342X-BB-EVM and
LMG34XX-BB-EVM) to interface with LMG352XEVM-04X. LMG342X-BB-EVM can support up to 4-kW, and
LMG34XX-BB-EVM can provide up to 1.7-kW. The mother boards are designed to operate LMG352XR0X0 in an
open-loop synchronous buck or boost converters. Probe locations are provided to measure the logic and power
stage voltages.
Note
TI provides a custom interposer board that must be used when the LMG352XEVM-04X is paried with
the LMG34XX-BB-EVM. The interposer board is not needed with LMG342x-BB-EVM.
2.1 LMG352XEVM-04X Daughter Card
The LMG352XEVM-04X has two LMG352XR0X0 GaN FETs in a half-bridge configuration. All the bias and level
shifting components are included, which allows low-side referenced signals to control both FETs. High-frequency
decoupling capacitors are included on the power stage in an optimized layout to minimize parasitic inductance
and reduce voltage overshoot.
Table 2-1. EVM Version Lookup Table
EVM NAME
FEATURED GaN FET WITH INTEGRATED DRIVER AND
PROTECTION
LMG3522EVM-042
LMG3522R030
LMG3525EVM-042
LMG3525R030 (with ideal diode mode)
There are 12 logic pins on the LMG352XEVM-04X.
Table 2-2. Logic Pin Function Description
PIN
PIN DESIGNATION
DESCRIPTION
LS PWM
1
Logic gate signal input for low-side LMG352XR0X0. Compatible with both 3.3-V and 5-V logic.
Referenced to AGND.
HS TEMP
2
PWM TEMP output for high-side LMG352XR0X0. Referenced to AGND.
LS Fault
3
FAULT output signal for low-side LMG352XR0X0. Referenced to AGND.
HS OC
4
OC output signal for high-side LMG352XR0X0. Referenced to AGND.
LS OC
5
OC output signal for low-side LMG352XR0X0. Referenced to AGND.
HS Fault
6
FAULT output signal for high-side LMG352XR0X0. Referenced to AGND.
LS Temp
7
PWM TEMP output for low-side LMG352XR0X0 . Referenced to AGND.
HS PWM
8
Logic gate signal input for high-side LMG352XR0X0. Compatible with both 3.3-V and 5-V logic.
Referenced to AGND.
12V
9
Auxiliary power input for when the LMG352XEVM-04X is configured in bootstrap mode. Pin is not
used when configured in isolated power mode.
5V
10
Auxiliary power input for the LMG352XEVM-04X. Used to power logic isolators. Used as input bias
power of LMG352XR0X0 devices when configured in isolated power mode.
AGND
11,12
Logic and bias power ground return pin. Functionally isolated from PGND.
There are 6 power pins on the LMG352XEVM-04X.
Table 2-3. Power Pin Function Description
PIN
DESCRIPTION
SW
Switch node of the half-bridge configuration
HV
Input DC voltage of the half-bridge configuration
PGND
Power ground of the half-bridge configuration. Functionally isolated from AGND.
Introduction
SNOU178A – OCTOBER 2020 – REVISED FEBRUARY 2021
LMG352XEVM-04X User Guide
5
Copyright © 2021 Texas Instruments Incorporated