Duty Ratio of ISETD PWM Signal
ISET
A Vo
lta
g
e (V
)
0
20%
40%
60%
80%
100%
0
0.5
1
1.5
2
2.5
3
3.5
ISETA (V)
V_Ideal (V)
ISETA Voltage (V)
Channe
l
DC
Cu
rr
ent
(A)
0
200
400
600
800
1000
1200
0
5
10
15
20
25
CH1 Current
CH2 Current
ISETA Voltage (mV)
R
egulatio
n Error (A)
0
200
400
600
800
1000 1200 1400 1600 1800
-1
-0.8
-0.6
-0.4
-0.2
0
0.2
Regulation Error (A)
Ideal
Curre
nt (
A)
-5
0
5
10
15
20
25
30
35
Channel DC Current (A)
ISETA Voltage (mV)
Regu
latio
n Error (A)
0
200
400
600
800
1000 1200 1400 1600 1800
-0.45
-0.4
-0.35
-0.3
-0.25
-0.2
-0.15
-0.1
-0.05
0
0.05
Regulation Error (A)
Ideal
Curre
nt (
A)
0
5
10
15
20
25
30
35
Channel DC Current (A)
Load Current (A)
E
ffi
ci
e
n
c
y (
%
)
0
10
20
30
40
50
60
80
82
84
86
88
90
92
94
96
98
100
D001
V
IN
= 24 V
V
IN
= 36 V
V
IN
= 48 V
V
IN
= 60 V
Load Current (A)
Ef
fi
ci
ency
(%)
0
2
4
6
8
10
12
14
80
82
84
86
88
90
92
94
96
98
100
V
IN
= 16 V
V
IN
= 12 V
V
IN
= 8 V
Test Data
14
SNVU543A – November 2016 – Revised December 2016
Copyright © 2016, Texas Instruments Incorporated
LM5170-Q1 EVM User Guide
4
Test Data
4.1
Efficiency
Figure 4. Buck Mode Efficiency vs Input Voltage and Load
Current: V
OUT
= 14.5 V
Figure 5. Boost Mode Efficiency vs Input Voltage and Load
Current: V
OUT
= 50.5 V
4.2
Current Regulation and Monitoring
Figure 6. Channel DC Current Regulation vs ISETA: Buck
Mode
Figure 7. Channel DC Current Regulation vs ISETA: Boost
Mode
Figure 8. ISETD to ISETA Conversion
Figure 9. Current Sharing Between Two Channels