Texas Instruments LM5156EVM-BST, Руководство пользователя

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Features and Electrical Performance
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4 SNVU696A – February 2020 – Revised June 2020
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Copyright © 2020, Texas Instruments Incorporated
LM5156EVM-BST User's Guide
1.2 Configuration Points
Table 2 indicates the available test points and configuration jumpers. These points offer flexibility in
configuring the evaluation module and include but are not limited to;
• BIAS pin to be connected to:
– External supply (VAUX)
– Input voltage (VIN)
– Regulated output voltage (VOUT)
– VCC pin
• PGOOD pin to be supplied by either VCC or VAUX
• External clock synchronization
• Shut-down signal by pulling the UVLO pin low.
Table 2. Jumper Description
Jumper Pin Description
TP1 VIN Positive input voltage sense connection
TP2 SW Probe point for the switch node of the LM5156 boost circuit
TP3 VOUT Positive output voltage sense connection
TP4 VIN- Negative input voltage sense connection
TP5 GND Negative output voltage sense connection
TP6 VCCext
Supply VCC from and external supply. Note VCCext must be less than the voltage on the
BIAS pin.
TP7 VAUX Supply the BIAS pin from and external supply. R12 also connect to this rail
TP8 VOUT+ Loop response positive injection point
TP9 VOUT- Loop response negative injection point
TP10 SYNC Input for external clock synchronization
TP11 SD High signal pulls UVLO pin to ground entering shutdown mode
J6
Pin 1 to pin 2 Connect VOUT to the BIAS pin of the LM5156 through D3
Pin 2 to pin 3 Directly connect VOUT to BIAS pin of the LM5156
J7
Pin 1 to pin 2 Connect VIN to the BIAS pin of the LM5156 through D4
Pin 2 to pin 3 Directly connect VIN to BIAS pin of the LM5156
J8 Pin 1 to pin 2 Directly Connect VCC to the BIAS pin
J9 Pin 1 to pin 2 Directly connect VAUX to the BIAS pin
J10
Pin 1 to Pin 2 Disable spread spectrum
Pin 2 to Pin 3 Enable spread spectrum
J11
VCC (Pin 1) Monitor the VCC pin
BIAS-IC (Pin 2) Monitor the BIAS pin
PGOOD (Pin 3) Monitor the PGOOD pin
COMP (Pin 4) Monitor the COMP pin
SS (Pin 5) Monitor the SS pin
UVLO (Pin 6) Monitor the UVLO pin
AGND (Pin 7) Connection to AGND plan