Texas Instruments ISO1644DWEVM, Руководство пользователя

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6 EVM Schematic and PCB
The ISO1644DW isolated I
2
C EVM comes with an ISO1644DW installed in place of U1. This EVM can also
be configured for use with an ISO1642DW or ISO1643DW. Each signal line (SDAx, SCLx) is configured with a
3.3-kΩ pullup resistor (R1 to R4) to the corresponding power supply (VCCx). These resistors may be replaced
with 0805 resistors of other values per the application requirements. For insight on calculating appropriate pullup
resistor values for I
2
C buses, please refer to the I2C Bus Pullup Resistor Calculation application report .
Note
ISO164x devices are designed to sink different amounts of current on side 1 and side 2, be careful to
choose resistors that keep I
OL1
and I
OL2
within the recommended operating range if replacing resistors
R1 to R4.
Signal pins may be tied directly to ground using the header pins (J1 on side 1; J2 on side 2) to simulate a
device pulling the I
2
C line low. While not being actively driven low, the lines will be pulled up through the included
pullup resistors. Signal lines should not be tied directly to a supply voltage without a pullup resistor to
limit input current . These jumpers also provide input /output signal access, including for oscilloscope probes, to
each pin.
Note
Ensure that SDAx and SCLx signal lines are not tied directly to VCCx. A current-limiting pullup resistor
is required, and populated by default, to limit current in the cases where the device pins drive a
low-voltage.
Figure 6-1 shows the schematic diagram for this EVM, and Figure 6-2 and Figure 6-3 show the printed circuit
board (PCB) layout.
GND1
VCC1
100nF
C3
GND2
VCC2
100nF
C6
VCC1
GND1 GND2
VCC2
1µF
C2
DNP
1µF
C5
DNP
1 2
3 4
5 6
7 8
9 10
11 12
13 14
J1
1 2
3 4
5 6
7 8
9 10
11 12
13 14
J2
GND1
GND1 GND2
GND2
GND1
VCC1 VCC2
GND2
10uF
C1
10uF
C4
ISO1644DWR
VCC1
1
VCC2
16
SDA1
3
SDA2
14
SCL1
6
SCL2
11
INA
4
INB
5
INC
10
OUTA
13
OUTB
12
OUTC
7
GND1
2
GND1
8
GND2
9
GND2
15
U1
3.3k
R1
3.3k
R2
3.3k
R3
3.3k
R4
VCC1 VCC2
TP8 TP9 TP10 TP11 TP12 TP13 TP14 TP15 TP16 TP1 TP2 TP3 TP4 TP5 TP6 TP7
Figure 6-1. ISO1644DWEVM Schematic
www.ti.com EVM Schematic and PCB
SLLU329 – JUNE 2021
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ISO1644DWEVM Reinforced Isolated I
2
C With GPIOs Evaluation Module 5
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