Functional Description
Table 2-4. J2 Connector
(1)
Analog
Tiva C
GPIOPCTL Register Setting
Function
J2
On-board
Series
GPIO
Pin
Function
MCU
GPIO
1
2
3
4
5
6
7
8
9
14
15
Pin
AMSEL
2.01
GND
2.02
PB2
–
–
47
–
–
I2C0SCL
–
–
–
T3CCP0
–
–
–
–
2.03
PE0
AIN3
–
9
U7Rx
–
–
–
–
–
–
–
–
–
–
2.04
PF0
–
USR_SW2/
28
U1RTS
SSI1Rx
CAN0Rx
–
M1PWM4
PhA0
T0CCP0
NMI
C0o
–
–
WAKE (R1)
2.05
RESET
PB7
–
–
4
–
SSI2Tx
–
M0PWM1
–
–
T0CCP1
–
–
–
–
PD1
AIN6
Connected
62
SSI3Fss
SSI1Fss
I2C3SDA
M0PWM7
M1PWM1
–
WT2CCP1
–
–
–
–
2.06
for MSP430
Compatibility
(R10)
PB6
–
–
1
–
SSI2Rx
–
M0PWM0
–
–
T0CCP0
–
–
–
–
PD0
AIN7
Connected
61
SSI3Clk
SSI1Clk
I2C3SCL
M0PWM6
M1PWM0
–
WT2CCP0
–
–
–
–
2.07
for MSP430
Compatibility
(R9)
2.08
PA4
–
–
21
–
SSI0Rx
–
–
–
–
–
–
–
–
–
2.09
PA3
–
–
20
–
SSI0Fss
–
–
–
–
–
–
–
–
–
2.10
PA2
–
–
19
–
SSI0Clk
–
–
–
–
–
–
–
–
–
(1)
Shaded cells indicate configuration for compatibility with the MSP430 LaunchPad.
Table 2-5. J3 Connector
(1)
Analog
Tiva C
GPIOPCTL Register Setting
Function
J3
On-board
Series
GPIO
Pin
Function
MCU
GPIO
1
2
3
4
5
6
7
8
9
14
15
Pin
AMSEL
3.01
5.0 V
3.02
GND
PD0
AIN7
–
61
SSI3Clk
SSI1Clk
I2C3SCL
M0PWM6
M1PWM0
–
WT2CCP0
–
–
–
–
PB6
–
Connected
1
–
SSI2Rx
–
M0PWM0
–
T0CCP0
–
–
–
–
3.03
for MSP430
Compatibilit
y (R9)
PD1
AIN6
–
92
SSI3Fss
SSI1Fss
I2C3SDA
M0PWM7
M1PWM1
–
WT2CCP1
–
–
–
–
PB7
–
Connected
4
–
SSI2Tx
–
M0PWM1
–
–
T0CCP1
–
–
–
–
3.04
for MSP430
Compatibilit
y (R10)
3.05
PD2
AIN5
63
SSI3Rx
SSI1Rx
–
M0FAULT0
–
–
WT3CCP0
USB0EPE
N
3.06
PD3
AIN4
–
64
SSI3Tx
SSI1Tx
–
–
–
–
WT3CCP1
USB0PFLT
–
–
–
3.07
PE1
AIN2
–
8
U7Tx
–
–
–
–
–
–
–
–
–
3.08
PE2
AIN1
–
7
–
–
–
–
–
–
–
–
–
–
–
3.09
PE3
AIN0
–
6
–
–
–
–
–
–
–
–
–
–
–
3.10
PF1
–
–
29
U1CTS
SSI1Tx
–
–
M1PWM5
–
T0CCP1
–
C1o
TRD1
–
(1)
Shaded cells indicate configuration for compatibility with the MSP430 LaunchPad.
10
Hardware Description
SPMU296 – April 2013
Copyright © 2013, Texas Instruments Incorporated