Texas Instruments DS90UB96X-Q1EVM, Руководство пользователя, Страница: 50 / 65

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DS90UB964Q_POC.SchDoc
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DS90UB964Q1_EVM Project Title:
Designed for: Public Release
Assembly Variant: [No Variations]
© Texas Instruments 2015
Drawn By:
Engineer:
Dac Tran
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application. Version control disabled SVN Rev:
SV601176 Number: Rev: A
CAMERA 1
GND
CAMERA 2
GND
CAMERA 3
GND
RIN2_P
CAMERA 4
GND
57.6
R74
200
R78
240pF
C84
200
R79
240pF
C85
57.6
R75
200
R86
240pF
C98
57.6
R84
200
R87
240pF
C99
57.6
R85
GND GND
GND GND
VFEED_POC1
VFEED_POC1
1 2
3 4
L19
DLW21SN900HQ2L
1.00k
R69
L14
MSS7341T-104MLB
VFEED1
GND
4.7 µ F
C75
4.7 µ F
C73
0.1 µ F
C74
0.1 µ F
C72
GND
RIN0_P
RIN0_P
RIN0_N
RIN0_N
0.047 µ F
C82
1.00k
R81
L24
MSS7341T-104MLB
VFEED3
GND
4.7 µ F
C89
4.7 µ F
C87
0.1 µ F
C88
0.1 µ F
C86
GND
RIN2_P
RIN2_N
RIN2_N
1 2
3 4
L29
DLW21SN900HQ2L
1.00k
R71
L16
MSS7341T-104MLB
VFEED2
GND
4.7 µ F
C79
4.7 µ F
C77
0.1 µ F
C78
0.1 µ F
C76
GND
RIN1_P
RIN1_P
RIN1_N
RIN1_N
1 2
3 4
L20
DLW21SN900HQ2L
1.00k
R83
L26
MSS7341T-104MLB
VFEED4
GND
4.7 µ F
C93
4.7 µ F
C91
0.1 µ F
C92
0.1 µ F
C90
GND
RIN3_P
RIN3_P
RIN3_N
RIN3_N
1 2
3 4
L30
DLW21SN900HQ2L
VFEED_POC2
VFEED_POC2
1 2
3 4
5 6
7 8
J32
4
1
2
3
J33
V
F
E
E
D
1
V
F
E
E
D
2
V
F
E
E
D
3
V
F
E
E
D
4
0.1 µ F
C80
0.1 µ F
C81
0.1 µ F
C94
0.1 µ F
C95
0.047 µ F
C83
0.047 µ F
C97
0.047 µ F
C96
1.00k
R68
1.00k
R70
1.00k
R82
1.00k
R80
1800 ohm
L17
1800 ohm
L18
1800 ohm
L28
1800 ohm
L27
1000 ohm
L11
1000 ohm
L12
4.7 µ H
L13
4.7 µ H
L15
1000 ohm
L21
1000 ohm
L22
4.7 µ H
L23
4.7 µ H
L25
1
2 3 4 5
CN1
59S10H-40ML5-Z
1
2 3 4 5
CN2
59S10H-40ML5-Z
1
2 3 4 5
CN3
59S10H-40ML5-Z
1
2 3 4 5
CN4
59S10H-40ML5-Z
CN1RIN0_P
CN1RIN0_N
CN2RIN1_P
CN2RIN1_N
CN4RIN3_N CN3RIN2_N
CN4RIN3_P CN3RIN2_P
SH-J6
Assembly Note
ZZ7
Place Jumper on J32.7-8
SH-J5
SH-J4
SH-J3
Assembly Note
ZZ8
Place Jumper on J32.5-6
Assembly Note
ZZ9
Place Jumper on J32.3-4
Assembly Note
ZZ10
Place Jumper on J32.1-2
Layout Note: Arrange
headers as 4x3 block
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