
1
1
2
2
3
3
4
4
5
5
6
6
D
D
C
C
B
B
A
A
3
7
5/11/2016
DS90UB964Q_CONNECTOR.SchDoc
Sheet Title:
Size:
Mod. Date:
File:
Sheet:
of
B
http://www.ti.com
Contact:
http://www.ti.com/support
DS90UB964Q1_EVM
Project Title:
Designed for:
Public Release
Assembly Variant:
[No Variations]
©
Texas Instruments
2015
Drawn By:
Engineer:
Dac Tran
Texas Instruments and/or its licensors do not warrant the accuracy or completeness of this specification or any information contained therein. Texas Instruments and/or its licensors do not
warrant that this design will meet the specifications, will be suitable for your application or fit for any particular purpose, or will operate in an implementation. Texas Instruments and/or its
licensors do not warrant that the design is production worthy. You should completely validate and test your design implementation to confirm the system functionality for your application.
Version control disabled
SVN Rev:
SV601176
Number:
Rev:
A
EXP_SCL0
EXP_SDA0
EXP_REF_CLK0
GND
CSI1_CLK_P
CSI1_CLK_N
CSI1_D0_P
CSI1_D0_N
CSI1_D1_P
CSI1_D1_N
CSI1_D2_P
CSI1_D2_N
CSI1_D3_P
CSI1_D3_N
EXP_SCL1
EXP_SDA1
EXP_REF_CLK1
GND
0
R34
0
R35
EXP_SCL0
EXP_SCL1
I2C_SCL
0
R36
0
R37
EXP_SDA0
EXP_SDA1
I2C_SDA
CSI1_CLK_P
CSI1_CLK_N
CSI1_D0_P
CSI1_D0_N
CSI1_D1_P
CSI1_D1_N
CSI1_D2_P
CSI1_D2_N
CSI1_D3_P
CSI1_D3_N
I2C_SCL
I2C_SDA
0
R58
VDD_3V3
VDD_1V8
0
R59
VDD_3V3
VDD_1V8
0
R42
VDD_3V3
VDD_1V8
0
R46
VDD_3V3
VDD_1V8
0
R32
0
R33
EXP_REF_CLK0
EXP_REF_CLK1
REFCLK
REFCLK
0
R43
0
R44
RESETn_0
RESETn_1
PDB
PDB
RESETn_0
RESETn_1
SPI_MOSI_0
SPI_SCLK_0
SPI_CSn_0
SPI_MOSI_1
SPI_SCLK_1
SPI_CSn_1
0
R45
0
R47
SPI_MOSI_0
SPI_MOSI_1
GPIO0
0
R48
0
R49
SPI_SCLK_0
SPI_SCLK_1
0
R50
0
R51
SPI_CSn_0
SPI_CSn_1
GPIO1
GPIO2
0
R38
0
R39
EXP_SCL0
EXP_SCL1
I2C_SCL2
0
R40
0
R41
EXP_SDA0
EXP_SDA1
I2C_SDA2
I2C_SCL2
I2C_SDA2
BOTTOM MOUNT
TOP MOUNT
0
R52
0
R53
SPI_MOSI_0
SPI_MOSI_1
GPIO3
0
R54
0
R55
SPI_SCLK_0
SPI_SCLK_1
0
R56
0
R57
SPI_CSn_0
SPI_CSn_1
GPIO4
GPIO5
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
CSI0_CLK_P
CSI0_CLK_N
CSI0_D0_P
CSI0_D0_N
CSI0_D1_P
CSI0_D1_N
CSI0_D2_P
CSI0_D2_N
CSI0_D3_P
CSI0_D3_N
CSI0_CLK_P
CSI0_CLK_N
CSI0_D0_P
CSI0_D0_N
CSI0_D1_P
CSI0_D1_N
CSI0_D2_P
CSI0_D2_N
CSI0_D3_P
CSI0_D3_N
EXP_SCL0
EXP_SDA0
EXP_REF_CLK0
GND
0
R72
VDD_3V3
VDD_1V8
0
R73
VDD_3V3
VDD_1V8
RESETn_0
SPI_MOSI_0
SPI_SCLK_0
SPI_CSn_0
TOP MOUNT
CSI0_CLK_P
CSI0_CLK_N
CSI0_D0_P
CSI0_D0_N
CSI0_D1_P
CSI0_D1_N
CSI0_D2_P
CSI0_D2_N
CSI0_D3_P
CSI0_D3_N
0 0201
R130
0 0201
R131
0 0201
R132
0 0201
R133
0 0201
R134
0 0201
R135
0 0201
R136
0 0201
R137
0 0201
R138
0 0201
R139
CSI1_CLK_P
CSI1_CLK_N
CSI1_D0_P
CSI1_D0_N
0 0201
R140
0 0201
R141
0 0201
R142
0 0201
R143
CSI1_D1_P
CSI1_D1_N
0 0201
R144
0 0201
R145
1
3
2
4
5
7
6
8
9
11
10
12
13
15
14
16
17
19
18
20
21
23
22
24
25
27
26
28
29
31
30
32
33
35
34
36
37
39
38
40
MP1
MP2
MP3
MP4
J31
QTH-020-04-L-D-DP-A
GND
1
3
2
4
5
7
6
8
9
11
10
12
13
15
14
16
17
19
18
20
21
23
22
24
25
27
26
28
29
31
30
32
33
35
34
36
37
39
38
40
MP1
MP2
MP3
MP4
J6
QSH-020-01-H-D-DP-A
1
3
2
4
5
7
6
8
9
11
10
12
13
15
14
16
17
19
18
20
21
23
22
24
25
27
26
28
29
31
30
32
33
35
34
36
37
39
38
40
MP1
MP2
MP3
MP4
J7
QSH-020-01-H-D-DP-A
GND
GND
0_CLK_P
0_CLK_N
0_DO_P
0_DO_N
0_D1_P
0_D1_N
0_D2_P
0_D2_N
0_D3_P
0_D3_N
1_CLK_P
1_CLK_N
1_D0_P
1_D0_N
1_D1_P
1_D1_N
-Remove R130-R145 for CSI2 source connected to J6/J7
-Populate R130-R145 when source connected through J31
** R130-R145 to be placed as near as J6/J7 to avoid stub
when J31 is not in use **
48
SNLU177 – July 2016
Copyright © 2016, Texas Instruments Incorporated
PCB Schematics