3
SNLU232A – August 2018 – Revised May 2019
Copyright © 2018–2019, Texas Instruments Incorporated
List of Figures
List of Figures
1-1.
Applications Diagram
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1-2.
Typical Configuration
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1-3.
Interfacing to the EVM
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1-4.
Launching ALP
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1-5.
Initial ALP Screen
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1-6.
Follow-Up Screen
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1-7.
ALP Information Tab
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1-8.
ALP HDMI Tab
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1-9.
ALP Pattern Generator Tab
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1-10.
ALP Registers Tab
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1-11.
ALP Device ID Selected
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1-12.
ALP Device ID Expanded
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1-13.
ALP Scripting Tab
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1-14.
USB2ANY Setup
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1-15.
Remove Incorrect Profile
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1-16.
Add Correct Profile
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1-17.
Finish Setup
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1-18.
ALP No Devices Error
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1-19.
Windows 7, ALP USB Driver
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1-20.
ALP in Demo Mode
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1-21.
ALP Preferences Menu
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1-22.
Typical Test Setup for Video Application
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1-23.
Typical Test Setup for Evaluation
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A-1.
Schematic - Block Diagram
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A-2.
Schematic - DS90UH949A-Q1 and Power Decoupling
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A-3.
Schematic - MSP430
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A-4.
Schematic - PDB, IDx and MODE_SEL Switches
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A-5.
Schematic - HDMI, HSD, SMA, I2C, DDC, CEC and GPIO/I2S/SPI Connectors
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A-6.
Schematic - LEDs
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A-7.
Schematic - Audio (Not Populated)
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A-8.
Schematic - Power Regulators
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A-9.
Schematic - Hardware
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B-1.
Board Layer - Top Overlay
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B-2.
Board Layer - Top Solder
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B-3.
Board Layer - Top
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B-4.
Board Layer - Ground-1
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B-5.
Board Layer - Signal Layer
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B-6.
Board Layer - Power Split/GND
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B-7.
Board Layer - Ground - 2
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B-8.
Board Layer - Bottom
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B-9.
Board Layer - Bottom Solder
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