Texas Instruments DS90UB921-Q1EVM, Руководство пользователя

Страница: 41 / 56

GND
49.9
R117
GND
4.7pF
C86
4.7pF
C85
0 R118
0 R119
SDA
SCL
0.1µF
C83
GND
GND
DIN0/R0
DIN1/R1
1
2
J32
5-146261-1
INTB
GND
4.7k
R116
4.7k
R115
DOUT0_P
DOUT0_N
GND
1 2
3 4
L11
DLW21SN900HQ2L
L10_P
L10_N
SMA_D0N
SMA_D0P
5 0 o h m s i n g l e -e n d e d t r a c e
5 0 o h m s i n g l e -e n d e d t r a c e
5 0 o h m s i n g l e -e n d e d t r a c e s
5 0 o h m s i n g l e -e n d e d t r a c e s
0 .6 2 5 "
SCL
SDA
VCC
1
NC
2
IO1
3
GND
4
IO2
5
U9
TPD2E001DRLR
SCL
SDA
GND
GND
Layout note:
Overlay footprint for SMA and FAKRA
connector - signal pin 1 on both is the
Same pad
VDD33
VDD33
DOUT_N
DOUT_P
DOUTSMA0_N
DOUTSMA0_P
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15
17
19
21
23
25
27
29
31
33
35
37
39 16
18
20
22
24
26
28
30
32
34
36
38
40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
J26
TSW-128-07-G-D
1
2 3 4 5
J27
59S20X-40ML5-Z
GND
DIN8/G0
DIN9/G1
PCLK
DE
HS
VS
DIN23/B7
DIN22/B6
DIN21/B5
DIN20/B4
DIN19/B3
DIN18/B2
DIN17/B1
DIN16/B0
DIN15/G7
DIN14/G6
DIN13/G5
DIN12/G4
DIN11/G3
DIN10/G2
DIN9/G1
DIN8/G0
DIN7/R7
DIN6/R6
DIN5/R5
DIN4/R4
DIN3/R3
DIN2/R2
DIN1/R1
DIN0/R0
1
2 3 4 5
J28
142-0701-851
1
2 3 4 5
J29
142-0701-851
4
1
2
3
J30
0022112042
2
1
4
3
PAIR A1
PAIR A2
EMITTER
P1
D4S20D-40ML5-Z
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15
17
19 16
18
20
J31
PEC10DAAN
DIN16/B0
DIN17/B1
I2S_DA
I2S_WC
I2S_CLK
REM_INTB
0.1µF
C80
DNP
0.1µF
C81
DNP
GND
0.33µF
C82
0.15µF
C84
DOUT0SMA_P
DOUT0SMA_N
100 OHM DIFFERENTIAL
DOUT0_N
DOUT0_P
DIN7/R7
DIN14/G6
DIN6/R6
DIN0/R0
DIN1/R1
DIN2/R2
DIN3/R3
DIN8/G0
DIN5/R5
DIN4/R4
DIN9/G1
DIN15/G7
DIN10/G2
DIN11/G3
DIN12/G4
DIN13/G5
DIN16/B0
DIN17/B1
DIN18/B2
DIN19/B3
DIN20/B4
DIN21/B5
DIN22/B6
DIN23/B7
HS
VS
DE
PCLK
0 R121
0 R124
0 R122
0 R123
0 R125
0 R126
PLACE RESISTORS CLOSE TO J30
Copyright © 2016, Texas Instruments Incorporated
www.ti.com
Appendix A
41 SNLU205 – March 2016
Submit Documentation Feedback
Copyright © 2016, Texas Instruments Incorporated
EVM PCB Schematics