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2.7 DS160PR412-421EVM Global Controls

Table 2-7

shows the DS160PR412 and DS160PR421 EVM global controls that affect all devices on the board.

Table 2-7. EVM Global Controls

COMPONENT

NAME

FUNCTION OR DESCRIPTION

DS160PR412-0

VCC

Pin 1 : Board VCC
Pin 2: PR412_0 VCC

DS160PR412-1

VCC

Pin 1 : Board VCC
Pin 2: PR412_1 VCC

DS160PR421-2

VCC

Pin 1 : Board VCC
Pin 2: PR421_2 VCC

DS160PR421-3

VCC

Pin 1 : Board VCC
Pin 2: PR421_3 VCC

PCIe JTAG TRST

1-2: Edge Finger to PCIe-A
3-4 Edge Finger to PCIe A + B
5-6 Edge Finger to PCIe-B

PCIe JTAG TCK

1-2: Edge Finger to PCIe-A
3-4 Edge Finger to PCIe A + B
5-6 Edge Finger to PCIe-B

PCIe TDI

1-2: Edge Finger to PCIe-A
3-4 Edge Finger to PCIe A + B
5-6 Edge Finger to PCIe-B

PCIe TDO

1-2: Edge Finger to PCIe-A
3-4 Edge Finger to PCIe A + B
5-6 Edge Finger to PCIe-B

PCIe TMS

Access point to the GND reference.

J10

Board Regulator

3.3-V Output

Pin 1 : Board 3.3V
Pin 2: GND

J11

Board 12-V Supply Pin 1 : Board 12V

Pin 2: GND

JMP7

MUX SEL

1-2 : PCIe Edge Finger to PCIe-B
2-3: PCIe Edge Finger to PCIe-A

JMP8

Redriver PD

1-2 : Power Down
2-3: Normal Operation

JMP17

I2C Interface Sel

1-2 : USB2ANY
2-3: Aardvark

JMP18

CLK Buffer Enable 1-2 : Disabled

2-3: Enabled

JMP19

CLK Buffer Input

Sel

1-2 : CLKIN1
2-3: CLKIN0

JMP20

CLK Buffer Ref.

Out

1-2 : Enabled
2-3: Disabled

www.ti.com

Description

SNLU288 – DECEMBER 2020

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DS160PR412-421EVM Evaluation Module

Содержание DS160PR412-421EVM

Страница 1: ...g features of the DS160PR412 and DS160PR421 Quad Channel PCI Express 4 0 Linear Redrivers This evaluation board can be used for standard compliance testing performance evaluation and initial system prototyping Figure 1 1 DS160PR412 421EVM www ti com SNLU288 DECEMBER 2020 Submit Document Feedback DS160PR412 421EVM Evaluation Module 1 Copyright 2020 Texas Instruments Incorporated ...

Страница 2: ...PR421 13 Figure 3 3 Configuration Headers 14 Figure 3 4 I2C Adapter Selection 15 Figure 3 5 Power 15 Figure 3 6 EDGE Finger 16 Figure 3 7 PCIe Clock 16 Figure 3 8 PCIe x8 Connector A 17 Figure 3 9 PCIe x16 Connector B 18 Figure 4 1 Top Layer 19 Figure 4 2 Layer 2 19 Figure 4 3 Layer 3 20 Figure 4 4 Layer 4 20 Figure 4 5 Layer 5 21 Figure 4 6 Bottom Layer 21 List of Tables Table 2 1 Four Level Cont...

Страница 3: ...edrivers operating at rates up to 25Gbps DS160PR412 linear redriver with 1 2 MUX DS160PR421 linear redriver with 2 1 DEMUX Linear equalization for seamless support of link training and PCIe channel extension CTLE boosts up to 18 dB at 8 GHz Device configuration and MUX selection by pin control SMBus or I2C Flow thru layout with no heat sink required Industrial temperature range 40 C to 85 C 1 2 Ap...

Страница 4: ... through standard SMBus protocol The DS160PR412 and DS160PR421 features two banks of channels Bank 0 Channels 0 1 and Bank 1 Channels 2 3 each featuring a separate register set and requiring a unique SMBus slave address The SMBus slave address pairs one for each channel bank are determined at power up based on the configuration of the MODE and EQ0 ADDR pins The pin state is read on power up after ...

Страница 5: ...9 0 13 12 L3 L0 9 5 14 5 13 L3 L1 10 0 15 14 L3 L2 10 5 16 0 15 L3 L3 12 18 The equalization gain of each channel of each device can also be set by writing to SMBus I2C registers in I2C Mode See the DS160PR412 DS160PR421 Programming Guide for details 2 5 DS160PR412 and DS160PR421 RX Detect State Machine Each DS160PR412 and DS160PR421 deploys an RX Detect state machine that governs the RX detection...

Страница 6: ... detection state machine is enabled Recommended for PCI Express use cases Pre Detect Hi Z Post Detect 50 Ω Outputs poll every approximately 150 μs until a valid RX termination detection H X Manual reset inputs are Hi Z 2 6 DS160PR412 and DS160PR421 DC Gain Control When operating in Pin Mode the GAIN SDA pin can be used to set the overall datapath DC low frequency gain of the DS160PR412 and DS160PR...

Страница 7: ... B J7 PCIe TDI 1 2 Edge Finger to PCIe A 3 4 Edge Finger to PCIe A B 5 6 Edge Finger to PCIe B J8 PCIe TDO 1 2 Edge Finger to PCIe A 3 4 Edge Finger to PCIe A B 5 6 Edge Finger to PCIe B J9 PCIe TMS Access point to the GND reference J10 Board Regulator 3 3 V Output Pin 1 Board 3 3V Pin 2 GND J11 Board 12 V Supply Pin 1 Board 12V Pin 2 GND JMP7 MUX SEL 1 2 PCIe Edge Finger to PCIe B 2 3 PCIe Edge F...

Страница 8: ...Q0 L0 3 4 EQ0 L1 5 6 EQ0 L2 NC EQ0 L3 7 8 EQ1 L0 9 10 EQ1 L1 11 12 EQ1 L2 NC EQ1 L3 13 14 MODE L0 15 16 MODE L1 17 18 MODE L2 NC MODE L3 JMP3 DS160PR412_0 RX_DET SCL 1 2 RX_DET L0 3 4 RX_DET L1 5 6 RX_DET L2 7 8 SCL NC RX_DET L3 JMP4 DS160PR412_0 GAIN SDA 1 2 GAIN L0 3 4 GAIN L1 5 6 GAIN L2 7 8 SCL NC GAIN L3 JMP5 DS160PR412_1 RX_DET SCL 1 2 RX_DET L0 3 4 RX_DET L1 5 6 RX_DET L2 7 8 SCL NC RX_DET ...

Страница 9: ...3 4 EQ0 L1 5 6 EQ0 L2 NC EQ0 L3 7 8 EQ1 L0 9 10 EQ1 L1 11 12 EQ1 L2 NC EQ1 L3 13 14 MODE L0 15 16 MODE L1 17 18 MODE L2 NC MODE L3 JMP9 DS160PR421_2 RX_DET SCL 1 2 RX_DET L0 3 4 RX_DET L1 5 6 RX_DET L2 7 8 SCL NC RX_DET L3 JMP10 DS160PR421_2 GAIN SDA 1 2 GAIN L0 3 4 GAIN L1 5 6 GAIN L2 7 8 SCL NC GAIN L3 JMP15 DS160PR421_3 RX_DET SCL 1 2 RX_DET L0 3 4 RX_DET L1 5 6 RX_DET L2 7 8 SCL NC RX_DET L3 J...

Страница 10: ...for the upstream redrivers 7 Plug the EVM into a PCIe x16 server motherboard slot Ensure the motherboard is powered down before installing the EVM or configured for hot plug operation 8 Install a compatible PCIe endpoint card into one of the PCIe connectors on the EVM based on configuration of the SEL pin Note PCIe A requires enabling bifurcation on the motherboard 9 Power up the motherboard 2 11 ...

Страница 11: ...plug operation 8 Install a compatible PCIe endpoint card into the straddle connector of the EVM 9 Power up the motherboard 10 Start the SigCon Architect application 11 Select the DS160PR412 421 Configuration Page and select the Apply box to enable the device profile If necessary edit device addresses in the Edit Device Addresses box 12 In the DS160PR412 421 High Level Page select Block Diagram as ...

Страница 12: ...3 1 through Figure 3 9 show the EVM schematics Figure 3 1 DS160PR412 Schematics www ti com 12 DS160PR412 421EVM Evaluation Module SNLU288 DECEMBER 2020 Submit Document Feedback Copyright 2020 Texas Instruments Incorporated ...

Страница 14: ...Figure 3 3 Configuration Headers Schematics www ti com 14 DS160PR412 421EVM Evaluation Module SNLU288 DECEMBER 2020 Submit Document Feedback Copyright 2020 Texas Instruments Incorporated ...

Страница 15: ...igure 3 4 I2C Adapter Selection Figure 3 5 Power www ti com Schematics SNLU288 DECEMBER 2020 Submit Document Feedback DS160PR412 421EVM Evaluation Module 15 Copyright 2020 Texas Instruments Incorporated ...

Страница 16: ...Figure 3 6 EDGE Finger Figure 3 7 PCIe Clock Schematics www ti com 16 DS160PR412 421EVM Evaluation Module SNLU288 DECEMBER 2020 Submit Document Feedback Copyright 2020 Texas Instruments Incorporated ...

Страница 17: ...Figure 3 8 PCIe x8 Connector A www ti com Schematics SNLU288 DECEMBER 2020 Submit Document Feedback DS160PR412 421EVM Evaluation Module 17 Copyright 2020 Texas Instruments Incorporated ...

Страница 18: ...Figure 3 9 PCIe x16 Connector B Schematics www ti com 18 DS160PR412 421EVM Evaluation Module SNLU288 DECEMBER 2020 Submit Document Feedback Copyright 2020 Texas Instruments Incorporated ...

Страница 19: ...re 4 6 illustrate the EVM PCB layout images Figure 4 1 Top Layer Figure 4 2 Layer 2 www ti com PCB Layouts SNLU288 DECEMBER 2020 Submit Document Feedback DS160PR412 421EVM Evaluation Module 19 Copyright 2020 Texas Instruments Incorporated ...

Страница 20: ...Figure 4 3 Layer 3 Figure 4 4 Layer 4 PCB Layouts www ti com 20 DS160PR412 421EVM Evaluation Module SNLU288 DECEMBER 2020 Submit Document Feedback Copyright 2020 Texas Instruments Incorporated ...

Страница 21: ...Figure 4 5 Layer 5 Figure 4 6 Bottom Layer www ti com PCB Layouts SNLU288 DECEMBER 2020 Submit Document Feedback DS160PR412 421EVM Evaluation Module 21 Copyright 2020 Texas Instruments Incorporated ...

Страница 22: ... Lumex 670 1006 SML_LX0805GC 14 4 JMP1 JMP2 JMP11 JMP14 Header 9x2 AMP 103322 9 15 8 JMP3 JMP4 JMP5 JMP6 JMP9 JMP 10 JMP15 JMP16 Header 4x2 AMP 103322 4 16 6 JMP7 JMP8 JMP17 JMP18 JMP19 J MP20 Header 3x1 AMP 103321 3 17 6 J1 J2 J3 J4 J10 J11 HDR2X1 M 1 AMP 103321 2 18 6 J5 J6 J7 J8 J9 J17 Header 4x2 AMP 103322 4 19 3 J12 J13 J14 SMP Rosenberger 19S101 40ML5 20 2 J15 J16 Header Amphenol ICC FCI 101...

Страница 23: ...s ERA 2AED103X 41 11 R95 R96 R97 R98 R99 R100 R101 R 102 R103 R104 R105 43 Panasonic Electronic Components ERA 2AKD430X 42 4 R106 R115 R116 R117 49 9 Panasonic Electronic Components ERJ 2RKF49R9X 43 4 R107 R108 R109 R110 33 Panasonic Electronic Components ERA 2AKD330X 44 0 R118 R119 100 Panasonic Electronic Components ERA 2AED101X 45 10 R121 R122 R123 R124 R125 R126 R127 R128 R129 R130 1 Yageo RC0...

Страница 24: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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