EVM Layout
www.ti.com
20
SLLU224B – August 2015 – Revised March 2018
Submit Documentation Feedback
Copyright © 2015–2018, Texas Instruments Incorporated
DP159RSB Evaluation Module
7
EVM Layout
Figure 14
through
Figure 19
illustrate the DP159RSBEVM PCB layouts.
Figure 14. Layer 1 (Top)
Figure 15. Layer 2 (GND)