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Power Supplies
Table 1. Digital Control (continued)
Pin Number
Signal
Description
J2.4
J2.10
GND
System (EVM) ground
J2.18
4
Power Supplies
The DACxx68EVM board is built with grade C devices and requires a 5 V DC for proper operation.
This 5-V supply powers the onboard voltage reference (U2) and the common-mode voltage output buffer
(U3). When used in combination with one of the DAP Interface boards, J3 provides connection to the
common power bus described in document
SLAA185
.
Table 2
shows the pinout of J3.
Table 2. J3 Power Input
Signal
Pin
Signal
Number
Unused
1
2
Unused
+5VA
3
4
Unused
GND
5
6
GND
Unused
7
8
Unused
Unused
9
10
Unused
When power is supplied to J3, JP4 allows for one of two different DC voltage sources to be applied to the
DAC installed on the EVM. Review the schematic and PCB silkscreen for details.
4.1
DAC Power
JP4 allows the user to select the power supply used by the DAC installed in position U1 on the EVM.
When JP4 is in the default factory position (Shunt on pins 1-2), power to the DAC comes from J3 pin 5,
which is designated as a +5VDC input. When the shunt on JP4 is moved to pins 2-3, the user may apply
an external power source to the DAC via TP1, referenced to TP4.
4.2
Stand-Alone Operation
When used as a stand-alone EVM, the analog power can be applied directly to TP5 referenced to pin
TP4. Optimal performance of the EVM requires a clean, well-regulated power source.
CAUTION
The DACs that are compatible with this EVM have a variety of power supply
requirements. Check the appropriate data sheets and verify that all power
supplies are within the safe operating limits of the converter before applying
power to the EVM.
5
EVM Operation
5.1
Analog Output
The analog output from the EVM is applied directly to J2 (top or bottom side) pins 2-16 (even). The
DACxx68EVM does not provide any additional filtering or buffering of the output voltage, so that the user
may evaluate the converter’s low-glitch output performance.
3
SLAU301 – November 2009
DACxx68EVM
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