User's Guide
SLAU301 – November 2009
DACxx68EVM
The DACxx68 Evaluation Module is an evaluation board containing all the necessary components to
evaluate the eight-channel DAC7568, DAC8168, or DAC8568 series of high-performance digital-to-analog
converters from Texas Instruments. The EVM is designed so that a single printed-circuit board (PCB)
supports the entire family of high-speed, 12- to 16-bit serial DACs. The EVM is provided with Grade C
devices which reset to zero and have a full-scale output range of 0 V to 5 V.
The modular EVM form factor allows for direct evaluation of the DAC’s performance and operating
characteristics. This EVM is compatible with the 5-6K Interface Board (
SLAU104
) from Texas Instruments
as well as the HPA-MCU Interface Board (
SLAU106
).
Contents
1
EVM Overview
...............................................................................................................
2
2
Analog Interface
.............................................................................................................
2
3
Digital Interface
..............................................................................................................
2
4
Power Supplies
..............................................................................................................
3
4.1
DAC Power
.........................................................................................................
3
4.2
Stand-Alone Operation
............................................................................................
3
5
EVM Operation
..............................................................................................................
3
5.1
Analog Output
......................................................................................................
3
5.2
Reference In/Out
...................................................................................................
4
5.3
Digital Control
......................................................................................................
4
5.4
SYNC
................................................................................................................
4
5.5
LOAD DAC (LDAC)
................................................................................................
4
5.6
CLEAR (CLR)
......................................................................................................
5
5.7
Default Jumper Locations
.........................................................................................
5
6
Bill of Material and EVM Schematic
......................................................................................
6
6.1
Bill of Materials
.....................................................................................................
6
6.2
EVM Schematic
....................................................................................................
7
7
Related Documentation from Texas Instruments
.......................................................................
8
List of Figures
1
Top Layer Assembly Drawing and Jumper Locations
..................................................................
5
List of Tables
1
Digital Control
...............................................................................................................
2
2
J3 Power Input
..............................................................................................................
3
3
EVM Default Jumper Settings
.............................................................................................
5
4
Bill of Materials
..............................................................................................................
6
1
SLAU301 – November 2009
DACxx68EVM
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