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Circuit Function

2-4

2.2.4

Internal Reference Operation

The full-scale output current is set by applying an external resistor (Rset)
between the BIASJ pins of the DAC5672/62/52 and ground. The full-scale
output current can be adjusted from 20 mA down to 2 mA by varying Rset or
changing the externally applied reference voltage. The full-scale output
current, IOUTFS, is defined as follows:

IOUT

FS

+

32

 

ǒ

V

EXTIO

Rset

Ǔ

where VEXTIO is the voltage at pin EXTIO. This voltage is 1.2 V typical when
using the internally provided bandgap reference voltage source. On the
DAC5672/62/52 EVM, R1 is used to set the output current of channel A and
R2 is used to set channel B.

2.2.5

External Reference Operation

The internal reference can be disabled by simply applying an external
reference voltage into the EXTIO pin using Test Point 2. The use of an external
reference may be considered for applications that require higher accuracy and
drift performance, or to add the ability of dynamic gain control. The reference
input has a high impedance and can easily be driven by various sources.

Caution 

The specified range for external reference voltages should be
observed (see the DAC5672/62/52 data sheet for details).

2.2.6

Sleep Mode

The DAC5672/62/52 EVM provides a means of placing the DAC5672/62/52
into a power-down mode. This mode is activated by placing jumper J11
between pins 5 and 6.

2.2.7

Gain Set

The full-scale output current on the DAC5672/62/52 can be set two ways: both
channels independently or simultaneously. For independent gain control, set
GSET to a logic low. For simultaneous mode, set GSET to a logic high.

2.2.8

Input Data Mode

The DAC5672/62/52 EVM provides a means of placing the DAC5672/62/52
into a dual port data input mode or interleaved mode. With MODE set to a logic
high, the device operates in dual port mode. With MODE set to a logic low, the
device operates in interleave mode.

Содержание DAC5652

Страница 1: ...2005 Wireless Infrastructure User s Guide SLAU139A...

Страница 2: ...ute a license from TI to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual pro...

Страница 3: ...handling or use of the goods Please be aware that the products received may not be regulatory compliant or agency certified FCC UL CE etc Due to the open construction of the product it is the user s r...

Страница 4: ...If there is uncertainty as to the load specification please contact a TI field representative During normal operation some circuit components may have case temperatures greater than 60 C The EVM is de...

Страница 5: ...Information About Cautions and Warnings This book may contain cautions and warnings This is an example of a caution statement A caution statement describes a situation that could potentially damage y...

Страница 6: ...the limits of computing devices pursuant to subpart J of part 15 of FCC rules which are designed to provide reasonable protection against radio frequency interference Operation of this equipment in o...

Страница 7: ...scription 2 1 2 1 Schematic Diagram 2 2 2 2 Circuit Function 2 2 2 2 1 Input Clock 2 2 2 2 2 Input Data 2 2 2 2 3 Output Data 2 3 2 2 4 Internal Reference Operation 2 4 2 2 5 External Reference Operat...

Страница 8: ...2 Layer 2 Ground Plane 3 3 3 3 Layer 3 Power Plane 3 4 3 4 Layer 4 Bottom Layer 3 5 Tables 1 1 Device List 1 2 2 1 Input Connector J1 2 2 2 2 Input Connector J10 2 3 2 3 Transformer Output Configurati...

Страница 9: ...the DAC5672 62 52 evaluation module EVM and provides a general description of the features and functions to be considered while using this module Topic Page 1 1 Purpose 1 2 1 2 EVM Basic Functions 1 2...

Страница 10: ...upplies In addition to the internal bandgap reference provided by the DAC5672 62 52 device options are provided on the EVM to allow external reference to be provided to the DAC 1 3 Power Requirements...

Страница 11: ...e clock source driving CLK_1 WRT_1 CLK_2 and WRT_2 from WRT_1 input R14 R16 R19 R24 R26 R28 and J4 J8 not installed Transformer coupled outputs using transformer T1 and T2 The converter is set to oper...

Страница 12: ...1 4...

Страница 13: ...cription This chapter gives the circuit description including input clock input data output data reference operations and sleep mode operation Topic Page 2 1 Schematic Diagram 2 2 2 2 Circuit Function...

Страница 14: ...rd configuration 2 2 2 Input Data The DAC5672 62 52 EVM can accept 3 3 V CMOS logic level data inputs through the 34 pin headers J9 and J10 per Table 2 1 and Table 2 2 The user can provide series damp...

Страница 15: ...led Signal Output The factory set configuration of the demonstration board provides the user with a single ended output signal at SMA connector J5 The DAC5672 62 52 is configured to drive a doubly ter...

Страница 16: ...reference may be considered for applications that require higher accuracy and drift performance or to add the ability of dynamic gain control The reference input has a high impedance and can easily b...

Страница 17: ...Description and Parts List This chapter describes the physcial characteristics and the PCB layout of the EVM and lists the components used on the module Topic Page 3 1 PCB Layout 3 2 3 2 Parts List 3...

Страница 18: ...yout 3 2 3 1 PCB Layout The EVM is constructed on a 4 layer 5 1 inch x 4 8 inch 0 062 inch thick PCB using FR 4 material Figure 3 1 through Figure 3 4 show the PCB layout for the EVM Figure 3 1 Top La...

Страница 19: ...PCB Layout 3 3 Physical Description and Parts List Figure 3 2 Layer 2 Ground Plane...

Страница 20: ...PCB Layout 3 4 Figure 3 3 Layer 3 Power Plane...

Страница 21: ...PCB Layout 3 5 Physical Description and Parts List Figure 3 4 Layer 4 Bottom Layer...

Страница 22: ...tor 1 16 W 1 4 ERJ 3EKF49R9V Panasonic R3 R4 R5 R6 2 k resistor 1 16 w 1 2 ERJ 3EKF1001V Panasonic R1 R2 49 9 resistor 1 16 W 1 1 ERJ 2RFK49R9X Panasonic R20 R14 R16 R19 51 resistor pack 4 CTS RP5 RP8...

Страница 23: ...4 1 Schematics Schematics The following pages contain the schematics for the EVM Chapter 4...

Страница 24: ...9 DA4 10 DA3 11 DA2 12 DA1 13 DA0 LSB 14 DGND 15 DVDD 16 WRTA WRTIQ 17 CLKA CLKIQ 18 CLKB RESETIQ 19 WRTB SELECTIQ 20 DGND 21 VFUSE 22 DB13 MSB 23 DB12 24 DB11 25 DB10 26 DB9 27 DB8 28 DB7 29 DB6 30 D...

Страница 25: ...27 28 29 30 31 32 33 34 J10 34PIN_IDC 3 3VA SLEEP MODE SLEEP MODE 3 ROW 30 PIN CONNECTOR SH 1 SH 1 SH 1 SH 1 NOTE 1 DO NOT INSTALL GSET GSET SH 1 1 2 3 4 5 6 7 8 RP5 51 1 2 3 4 5 6 7 8 RP6 51 1 2 3 4...

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