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Revision History

SLAU671A – October 2016 – Revised March 2017

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Revision History

Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Original (October 2016) to A Revision

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Modified abstract to specify all the EVMs part of DAC38RF8xEVM family.

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Removed instructions for installing HSDCPRO patch.

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Removed HSDCPRO patch from the list of required software in the

Required Hardware and Software

section.

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Added information on various jumpers on EVM in

Table 2

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Added information on the various available clocking options on EVM in

Section 1.2.1

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Updated

Figure 4

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Added new figure in

Figure 5

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Updated

Figure 8

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Updated

Figure 11

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Included information on configuration file generation in

Section 3

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Added Removed

Known Issues

section from before

Appendix A

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Содержание DAC38RF80EVM

Страница 1: ...es for Custom Boards 15 3 1 Status Log 15 3 2 Low Level View 15 Appendix A 17 Appendix B 18 List of Figures 1 DAC38RF8xEVM Block Diagram 2 2 Shunt Pin 1 and Pin 2 of JP10 Jumper Enabling External Clock Mode 5 3 DAC38RF83 EVM Setup for External Clock Mode 6 4 DAC38RF8xEVM GUI Quick Start Page Configured for External Clock Mode 7 5 DAC38RF8xEVM GUI External Clock Select Checkbox 7 6 Open Pin 1 and P...

Страница 2: ...e and Software The following hardware and software are required to evaluate the DAC38RF8x device 1 DAC38RF8xEVM Main circuit board containing the DAC to be evaluated 2 DAC38RF8xEVM Graphical User Interface GUI Software that controls the DAC EVM http www ti com tool TSW14J56EVM 3 TSW14J56 EVM Hardware that generates digital patterns for the DAC http www ti com tool TSW14J56EVM 4 HSDC Pro software S...

Страница 3: ...board 122 88 MHz VCXO Y1 Leave open when VCXO is not used Closed Enables power to the on board 122 88 MHz VCXO JP8 Open Open Enables VDDDIG1 supply U37 Closed disables VDDDIG1 supply U37 JP9 Open Open Enables VEE18N supply U19 Closed disables VEE18N supply U19 JP10 Shunt pin 1 2 Closed Enable external clock mode Open Enable on chip PLL clock mode J11 Open Not used J22 Open Provides access to exter...

Страница 4: ...his mode is for evaluating the DAC performance with a low frequency reference clock and the internal PLL VCO as the sampling clock To use this mode connect a clock at 6 dBm to SMA J4 and remove the shunt connecting pin1 and 2 of jumper JP10 Keep all other hardware settings in the default configuration The frequency of the clock at SMA J4 is determined from the EVM GUI in a later step 1 2 1 4 On Bo...

Страница 5: ...C38RF8xEVM This section covers details on the TSW14J56 and DAC38RF8xEVM 1 Make sure both boards are not powered and not connected to the USB port of the PC 2 Connect the FMC connector of TSW14J56 EVM J4 to FMC connector of DAC38RF8xEVM J20 2 1 1 TSW14J56 1 Connect a 5 V power supply to connector J11 5 V IN 2 Connect a USB cable to the USB connector J9 3 Flip the power switch SW6 to the ON position...

Страница 6: ...reen USB Status indicator on the top right corner is lit If it is not lit click the Reconnect FTDI button and check the USB Status indicator again 3 From the Quick Start tab in the SELECT DEVICE drop down menu choose from the list of available devices The device list is automatically populated based on the type of EVM connected 4 On the Quick Start tab toggle the DAC RESETB Pin button and then cli...

Страница 7: ...gure 4 DAC38RF8xEVM GUI Quick Start Page Configured for External Clock Mode 7 Click on the CONFIGURE DAC button to load the DAC configuration data NOTE When using CMODE2 and after configuring the DAC in the preceding step 6 navigate to DAC38RF8x Clocking tab and de select the External Clock Select checkbox Figure 5 DAC38RF8xEVM GUI External Clock Select Checkbox ...

Страница 8: ...4 DAC38RF8xEVM Configuration With On Chip PLL CMODE3 Skip this section if using an external clock such as the DAC clock source NOTE The 2 pin jumper labeled JP10 must be open to enable on chip PLL clock mode This is shown in Figure 6 Other hardware changes may be required depending on the on chip PLL clocking mode selected These changes are described in Section 1 2 1 Figure 6 Open Pin 1 and Pin 2 ...

Страница 9: ... USB Status indicator again 3 On the Quick Start tab toggle the DAC RESETB Pin button and then click the Load Default button The software automatically configures the DAC to its default state 4 Check the PLL Enable box and enter the desired on chip PLL reference clock frequency NOTE The DAC Clock Frequency box automatically updates based on the M N and Ref Freq values entered If the calculated DAC...

Страница 10: ...he DAC configuration data 8 Click on the PLL AUTO TUNE button to automatically search for the correct PLL loop filter voltage setting If desired the PLL may be manually tuned by stepping through the VCO tune control until the PLL LF voltage is either 3 or 4 Both the VCO tune control and PLL LF voltage indicator are available on the DAC38RF8x Clocking tab 9 Click on Reset DAC JESD Core SYSREF TRIGG...

Страница 11: ...ng DAC38RF89EVM enter 307 2M in the Data Rate SPS field 6 Choose 2 s Complement in the DAC Option drop down menu 7 Set up the I Q Multitone Generator to generate a single tone at 100 k as shown in Figure 10 Ensure that the Tone Selection box is set to Complex and then click the Create Tones button Figure 10 Complex Single Tone Generation at 100 kHz in HSDC Pro 8 Click the Send button to load the g...

Страница 12: ...e UPDATE NCO button to configure the NCO NOTE For this example a If using DAC38RF80EVM DAC38RF87EVM or DAC38RF82EVM the sampling rate 6144 MHz and the NCO Frequency 2140 MHz b If using DAC38RF86EVM the sampling rate 8847 36 MHz and the NCO Frequency 2140 MHz c If using DAC38RF89EVM the sampling rate 4915 2 MHz and the NCO Frequency 2140 MHz 12 Navigate to the DAC38RF8x tab Digital DAC B and repeat...

Страница 13: ...016 2017 Texas Instruments Incorporated DAC38RF8xEVM Figure 12 DAC A Output at 1960 MHz and 2140 MHz Mixer Gain Off Dummy Date Enabled 2 1 7 Typical Performance Figure 13 and Figure 14 provide typical performance examples Figure 13 1 20 MHz LTE TM3 1 Center Frequency 1960 MHz DAC Coarse Gain 10 External Clock ...

Страница 14: ... x 1 0 9 3 6 x 1 0 9 3 8 x 1 0 9 4 x 1 0 9 4 2 x 1 0 9 4 4 x 1 0 9 20 15 10 5 0 5 10 D001 DAC38RF83 DAC38RF80 Quick Start www ti com 14 SLAU671A October 2016 Revised March 2017 Submit Documentation Feedback Copyright 2016 2017 Texas Instruments Incorporated DAC38RF8xEVM Figure 14 1 20 MHz LTE TM3 1 Center Frequency 2140 MHz DAC Coarse Gain 10 External Clock Figure 15 DAC Output Power vs Frequency ...

Страница 15: ...ol to 11 Check the status log for information on the SPI address 0x0D page 0x4 and data 0xB000 associated with the Coarse DAC Gain control The information in the status log can be interpreted as follows Write Register DAC38RF8x config 0x4 bits page address 8 bits register address 16 bits data Figure 16 DAC38RF8xEVM GUI Status Log 3 2 Low Level View The low Level View tab can be used to perform the...

Страница 16: ...ation Files for Custom Boards www ti com 16 SLAU671A October 2016 Revised March 2017 Submit Documentation Feedback Copyright 2016 2017 Texas Instruments Incorporated DAC38RF8xEVM Figure 17 DAC38RF8xEVM GUI Low Level View ...

Страница 17: ...eg Input Return Loss dB 17 SLAU671A October 2016 Revised March 2017 Submit Documentation Feedback Copyright 2016 2017 Texas Instruments Incorporated Appendix A SLAU671A October 2016 Revised March 2017 A 1 Output Balun Characteristics Figure 18 illustrates the DAC output circuit schematic DNI Device Not Installed Figure 18 DAC Output Circuit Schematic Figure 19 TCM3 452X 1 Frequency Response ...

Страница 18: ...balance deg Input Return Loss dB 18 SLAU671A October 2016 Revised March 2017 Submit Documentation Feedback Copyright 2016 2017 Texas Instruments Incorporated Appendix B SLAU671A October 2016 Revised March 2017 B 1 Clock Balun Characteristics Figure 20 illustrates the clock input path circuit schematic Figure 20 Clock Input Path Circuit Diagram Figure 21 NCR2 113 Frequency Response ...

Страница 19: ...all the EVMs part of DAC38RF8xEVM family 1 Removed instructions for installing HSDCPRO patch 2 Removed HSDCPRO patch from the list of required software in the Required Hardware and Software section 2 Added information on various jumpers on EVM in Table 2 3 Added information on the various available clocking options on EVM in Section 1 2 1 3 Updated Figure 4 7 Added new figure in Figure 5 7 Updated...

Страница 20: ...y set forth above or credit User s account for such EVM TI s liability under this warranty shall be limited to EVMs that are returned during the warranty period to the address designated by TI and that are determined by TI not to conform to such warranty If TI elects to repair or replace such EVM TI shall have a reasonable time to repair such EVM or provide replacements Repaired EVMs shall be warr...

Страница 21: ...the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated Antenna types not included in this list having a gain greater than the maximum gain indicated for that type are strictly prohibited for use with this device Concernant les EVMs avec antennes détachables Conformément à la réglementation d Industrie Canada le présent émetteur radio peut fo...

Страница 22: ...ed loads Any loads applied outside of the specified output range may also result in unintended and or inaccurate operation and or possible permanent damage to the EVM and or interface electronics Please consult the EVM user guide prior to connecting any load to the EVM output If there is uncertainty as to the load specification please contact a TI field representative During normal operation even ...

Страница 23: ...COST OF REMOVAL OR REINSTALLATION ANCILLARY COSTS TO THE PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES RETESTING OUTSIDE COMPUTER TIME LABOR COSTS LOSS OF GOODWILL LOSS OF PROFITS LOSS OF SAVINGS LOSS OF USE LOSS OF DATA OR BUSINESS INTERRUPTION NO CLAIM SUIT OR ACTION SHALL BE BROUGHT AGAINST TI MORE THAN TWELVE 12 MONTHS AFTER THE EVENT THAT GAVE RISE TO THE CAUSE OF ACTION HAS OCCURRED 8 2 Specif...

Страница 24: ... TI Resource NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT OF TI OR ANY THIRD PARTY IS GRANTED HEREIN including but not limited to any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI product...

Страница 25: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information Texas Instruments DAC38RF86EVM DAC38RF87EVM DAC38RF89EVM ...

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