DAC1006/1007/1008 — Simple Hookup for a “Quick Look”
1.0 DEFINITION OF PACKAGE PINOUTS
1.1 Control Signals (All control signals are level actuated.)
CS: Chip Select — active low, it will enable WR.
WR: Write — The active low WR is used to load the digital
data bits (DI) into the input latch. The data in the input latch
is latched when WR is high. The 10-bit input latch is split into
two latches; one holds 8 bits and the other holds 2 bits. The
Byte1/Byte2 control pin is used to select both input latches
when Byte1/Byte2 =1 or to overwrite the 2-bit input latch
when in the low state.
Byte1/Byte2: Byte Sequence Control — When this control
is high, all ten locations of the input latch are enabled. When
low, only two locations of the input latch are enabled and
these two locations are overwritten on the second byte write.
On the DAC1006, 1007, and 1008, the Byte1/Byte2 must be
low to transfer the 10-bit data in the input latch to the DAC
register.
XFER: Transfer Control Signal, active low — This signal, in
combination with others, is used to transfer the 10-bit data
which is available in the input latch to the DAC register —
see timing diagrams.
1.2 Other Pin Functions
DI
i
(i=0 to 9): Digital Inputs — DI
0
is the least significant bit
(LSB) and DI
g
is the most significant bit (MSB).
I
OUT1
: DAC Current Output 1 — I
OUT1
is a maximum for a
digital input code of all 1s and is zero for a digital input code
of all 0s.
I
OUT2
: DAC Current Output 2 — I
OUT2
is a constant minus
I
OUT1
, or
where R
≅
15 k
Ω
.
R
FB
: Feedback Resistor — This is provided on the IC chip
for use as the shunt feedback resistor when an external op
amp is used to provide an output voltage for the DAC. This
on-chip resistor should always be used (not an external re-
sistor) because it matches the resistors used in the on-chip
R-2R ladder and tracks these resistors over temperature.
V
REF
: Reference Voltage Input — This is the connection for
the external precision voltage source which drives the R-2R
ladder. V
REF
can range from −10 to +10 volts. This is also the
analog voltage input for a 4-quadrant multiplying DAC appli-
cation.
V
CC
: Digital Supply Voltage — This is the power supply pin
for the part. V
CC
can be from +5 to +15 V
DC
. Operation is op-
timum for +15V. The input threshold voltages are nearly in-
dependent of V
CC
. (See Typical Performance Characteristics
and Description in Section 3.0, T
2
L compatible logic inputs.)
GND: Ground — the ground pin for the part.
1.3 Definition of Terms
Resolution: Resolution is directly related to the number of
switches or bits within the DAC. For example, the DAC1006
has 2
10
or 1024 steps and therefore has 10-bit resolution.
Linearity Error: Linearity error is the maximum deviation
from a
straight line passing through the endpoints of the
DAC transfer characteristic. It is measured after adjusting for
zero and full-scale. Linearity error is a parameter intrinsic to
the device and cannot be externally adjusted.
National’s linearity test (a) and the “best straight line” test (b)
used by other suppliers are illustrated below. The “best
straight line” requires a special zero and FS adjustment for
each part, which is almost impossible for user to determine.
The “end point test” uses a standard zero and FS adjustment
procedure and is a much more stringent test for DAC linear-
ity.
Power Supply Sensitivity: Power supply sensitivity is a
measure of the effect of power supply changes on the DAC
full-scale output (which is the worst case).
DS005688-7
*
A TOTAL OF 10 INPUT SWITCHES & 1K RESISTORS
Notes:
1. For V
REF
=−10.240 V
DC
the output voltage steps are approximately 10 mV each.
2. SW1 is a normally closed switch. While SW1 is closed, the DAC register is latched and new data can be loaded into the input latch via the 10 SW2 switches.
When SW1 is momentarily opened the new data is transferred from the input latch to the DAC register and is latched when SW1 again closes.
www.national.com
7
PrintDate=1998/11/17 PrintTime=11:38:08 46711 ds005688 Rev. No. 4
cmserv
Proof
7
