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Table 2-11. MUX Switches (continued)
Reference Usage Comments Image
S2 SPI
When set to ‘PMIC_SPI’ position, the
MSS_SPIB interface is routed to the PMIC
and to the J16 header.
1
When set to ‘DBG_SPI’, the MSS_SPIB
interface is routed to the 60-pin debug header
(J7)
1. DNP resistors R5, R61, R167, and R176 must be populated to bring the MSS_SPIB interface out to the J16
header.
2.9.2 Sense On Power (SOP) Jumpers (J17, J18, J20)
The AWR2944EVM can be set to operate in different modes based on the state of the SOP [2:0] lines. These
lines are sensed ONLY during boot up of the AWR2944 device. The state of the device is described in
Table
2-12 .
A closed jumper refers to a ‘1’ and open the jumper refers to a ‘0’ state of the SOP signal going to the AWR2944
device.
Note
The SOP[2:0] pins can also be controlled via the on-board FTDI. In this case the FTDI settings would
override the jumper settings.
Table 2-12. SOP[0:2] Modes
Reference Usage Comments
J17 (SOP 2), J18 (SOP 1), J20 (SOP 0)
SOP[2:0]
101 (SOP mode 5) = Flashing mode
001 (SOP mode 4) = Functional mode
000 (SOP mode 3) = Reserved
011 (SOP mode 2) = Development mode
010 (SOP mode 1) = Reserved
Figure 2-25. SOP Jumpers
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30 AWR2944EVM User’s Guide SPRUJ22 – NOVEMBER 2021
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