FB
LM34917A
V
OUT
RON/SD
VIN
C1
SS
RTN
GND
3B
2A
On
Timer
Minimum
Off Timer
Logic
IN
Regulation
Comparator
Current Limit
Detect
8V to 33V
1.0
P
F
2C
C3
R1
22.1k
0.1
P
F
2B
1C
3A
C6
0.022
P
F
V
IN
10
P
F
SW
ISEN
SGND
5V
1D
3D
0.047
P
F
C4
0.1
P
F
L1
15
P
H
R6 0
:
2D
1B
D1
1A
R2
2.49k
R3
2.49k
R4
0
:
C7
C8
+
-
VCC
3C
BST
C5
2.5V
5.23 k
:
C9
C10
10
P
F
C2
GND
1.0
P
F
0.1
P
F
3300 pF
R5
R5 x C10 =
(8V
±
4.63V) x 510 ns
0.1V
= 0.172 x 10
-4
R5 x C10 =
(V
IN
-
V
A
) x t
ON
'
V
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Output Ripple Control
A) Minimum Output Ripple: This evaluation board is supplied configured for minimum ripple at V
OUT
by
using components R5, C9 and C10. The output ripple, which ranges from
≊
4mVp-p at V
IN
= 8V to
≊
14
mVp-p at V
IN
= 33V, is determined primarily by the ESR of output capacitance, and the inductor’s ripple
current, which ranges from 105 mAp-p to 350 mAp-p over the input voltage range. The ripple voltage
required by the FB pin is generated by R5, C9 and C10 since the SW pin switches from -1V to V
IN
, and
the right end of C10 is a virtual ground. The values for R5 and C10 are chosen to generate a 100 mVp-p
triangle waveform at their junction. That triangle wave is then coupled to the FB pin through C9.
The following procedure is used to calculate values for R5, C9, and C10:
1) Calculate the voltage V
A
:
V
A
= V
OUT
- (V
SW
× (1 - (V
OUT
/V
IN
)))
(2)
where V
SW
is the absolute value of the voltage at the SW pin during the off-time (typically 1V), and V
IN
is
the minimum input voltage. For this circuit V
A
calculates to 4.63V. This is the approximate DC voltage at
the R5/C10 junction, and is used in the next equation.
2) Calculate the R5 × C10 product:
(3)
where t
ON
is the maximum on-time (
≊
510 ns), V
IN
is the minimum input voltage, and
Δ
V is the desired
ripple amplitude at the R5/C10 junction, 100 mVp-p for this example.
(4)
R5 and C10 are then chosen from standard value components to satisfy the above product. For example,
C10 can be 3300 pF requiring R5 to be
≊
5.2 k
Ω
. C9 is chosen to be 0.1 µF, large compared to C10. The
circuit as supplied on this EVB is shown in
Figure 2
.
Figure 2. Minimum Output Ripple Configuration Using R5,C9,C10
3
SNOA484D – June 2007 – Revised April 2013
AN-1601 LM34917A Evaluation Board
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