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SPRUI97A – May 2017
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Copyright © 2017, Texas Instruments Incorporated
Contents
11.1
Tri-color LEDs
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21
11.2
Industrial Inputs
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21
11.3
Industrial Outputs / LEDs
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21
12
Pin Use Description
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12.1
Functional Interface Mapping
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12.2
GPIO Pin Mapping
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13
Board Connectors
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14
EVM Important Notice
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Appendix A Known Deficiencies in AM571x IDK EVM
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A.1
Power solution not sufficient for full PCIe plug-in card compliance
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A.2
Early versions of the AM571x IDK EVM not installed with SOC devices rated for the full industrial
temperature range
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A.3
AM571x IDK EVM does not support eMMC HS200 mode
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A.4
PCIe PERSTn line not in proper state at start-up
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A.5
EDIO connectors J4 and J7 should support real-time debugging for both PRU1 and PRU2
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A.6
HDQ implementation not correct
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A.7
Removing the power plug and inserting it again while the power supply is energized may cause
damage
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A.8
Software shutdown of PMIC not operational
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A.9
CCS System Reset fails
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A.10
AM571x IDK EVM design contains 2 clamp circuits that may not be necessary
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A.11
Crystal connected to osc0 needs to have 50ppm or better long term accuracy
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A.12
Software must program the CDCE913 for 0pf load capacitance
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A.13
Protection diode D2 should be rated for 5V
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A.14
PHY address LSB for U9 and U15 can be latched incorrectly
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A.15
3.3V clamp circuit needs more margin
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A.16
Current PMIC does not provide the mandated power down sequence
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40
A.17
Power supply droop may cause board reset
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A.18
AM5718 pin N21 must be connected to 1.8V, as it is VDDS18V_DDR1 and not N/C
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A.19
VOUT1 is used at 3.3V, which violates erratum i920
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Revision History
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