Texas Instruments AFE5801EVM, Руководство пользователя, Страница: 14 / 48

(a) (b) (c)
Board Operation
www.ti.com
3.4 Hardware Setup
As mentioned before, Xilinx DeSerializer ADSDeSER-50EVM or TSW1250EVM is required. Please see
details in the corresponding application notes on how to use the either of these EVMs. An example bench
setup is shown in
Figure 12 . Band-pass filters are required for signal source in order to ensure the correct
SNR measurements of the AFE5801.
Figure 12. Typical AFE5801 Bench Setup:
The channel order of the AFE5801 outputs is not exactly the same as the one of ADS527x outputs. As a
result, the channel number on the ADSDeSER-50EVM or AFE5801EVM might be misleading.
Table 1
provides channel-to-channel sequence matching between the ADSDeSER-50EVM and AFE5801EVM.
Table 1. Channel-to-Channel Matching Between the AFE5801EVM and ADSDeSER-50EVM
AFE FCLK CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 LCLK
Xilinx FCLK CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 LCLK
For example, when an analog signal is input at CH1 on the AFE5801EVM, the corresponding 12-bit digital
output will be seen at CH8 on the ADSDeSER-50EVM when the AFE5801 is configured as 8-channel
mode.
3.5 Clock Selection
AFE5801 is typically clocked through a transformer-based circuit. Other options are also available if
needed as shown in
Figure 13 .
Figure 13. Clock Selection Jumper Configurations: (a) Transformer (default);
(b) Single-ended Clock; (c) Future CLK Input Option Based on U1.
Both (b) and (c) Configurations Need Some Modifications on the PCB.
The clock source of the EVM could be the on-board clock 40MHz, HP8644 low jitter clock source, or
external clock source. The best performance of this EVM is achieved when low-jitter clock source HP8644
is used. The P4, P5, P6 should be removed in order to disable the on-board clock.
14 AFE5801 8-Channel Variable Gain Amplifier (VGA) with Octal High-Speed ADC SLOU257A – October 2009 – Revised July 2011
Submit Documentation Feedback
Copyright © 2009 – 2011, Texas Instruments Incorporated