Texas Instruments ADS869 Series, Руководство пользователя

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RST / PD
t
PL_RST_PD
ADS8694, ADS8698
www.ti.com SBAS686 – JULY 2015
Device Functional Modes (continued)
8.4.1.1.5 DAISY (Input)
DAISY is a serial input pin. When multiple devices are connected in daisy-chain mode, as illustrated in Figure 76 ,
the DAISY pin of the first device in the chain is connected to GND. The DAISY pin of every subsequent device is
connected to the SDO output pin of the previous device, and the SDO output of the last device in the chain goes
to the SDI of the host processor. If an application uses a stand-alone device, the DAISY pin is connected to
GND.
8.4.1.1.6 RST/PD (Input)
RST/PD is a dual-function pin. Figure 74 shows the timing of this pin and Table 5 explains the usage of this pin.
Figure 74. RST/PD Pin Timing
Table 5. RST/PD Pin Functionality
CONDITION DEVICE MODE
40 ns < t
PL_RST_PD
≤ 100 ns The device is in RST mode and does not enter PWR_DN mode.
The device is in RST mode and may or may not enter PWR_DN mode.
100 ns < t
PL_RST_PD
< 400 ns
NOTE: This setting is not recommended.
The device enters PWR_DN mode and the program registers are reset to default
t
PL_RST_PD
≥ 400 ns
value.
The devices can be placed into power-down (PWR_DN) mode by pulling the RST/PD pin to a logic low state for
at least 400 ns. The RST/PD pin is asynchronous to the clock; thus, RST/PD can be triggered at any time
regardless of the status of other pins (including the analog input channels). When the device is in power-down
mode, any activity on the digital input pins (apart from the RST/PD pin) is ignored.
The program registers in the device can be reset to their default values (RST) by pulling the RST/PD pin to a
logic low state for no longer than 100 ns. This input is asynchronous to the clock. When RST/PD is pulled back
to a logic high state, the devices are placed in normal mode. One valid write operation must be executed on the
program register in order to configure the device, followed by an appropriate command (AUTO_RST or MAN) to
initiate conversions.
When the RST/PD pin is pulled back to a logic high level, the devices wake-up in a default state in which the
program registers are reset to their default values.
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