6.3
As a Software Test Platform
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Using the ADS8472EVM
As a software test platform, connectors P1, P2, and P3 plug into the parallel interface connectors of the
5-6K interface board. The 5-6K interface board sits on the C5000 and C6000 digital signal processor
starter kits (DSK). The ADS8472EVM is mapped then into the processor’s memory space. The 5-6k
interface board also provides an area for signal conditioning. This area can be used to install application
circuit(s) for digitization by the ADS8472 analog-to-digital converter. For more information, see the 5-6K
Interface Board user’s guide (
) .
For the software engineer, the ADS8472EVM provides a simple platform for interfacing to the converter.
The EVM provides standard 0.1-inch headers and sockets to wire into prototype boards. The user need
only provide three address lines (A2, A1, and A0) and address valid line (DC_CS) to connector P3. To
select which address combinations generate RD and CONVST, set jumpers as shown in Table 3. Recall
that the Chip Select (CS) signal is not memory-mapped; therefore, it must be controlled by a
general-purpose pin or shorted to ground at J6 pin 1. If address decoding is not required, the EVM
provides direct access to converter data bus by P3 and control by J6.
SLAU203 – February 2007
ADS8472EVM
9
