background image

5.3 Schematic

Figure 5-8

 shows the schematic for the ADS704X-5XEVM.

EVM_CAP

EVM_REG_5V5

EVM_ID_PWR

EVM_ID_SDA

EVM_ID_SCL

WP

EVM_ID_PWR

EVM_ID_PWR

EVM_ID_SDA
EVM_ID_SCL

EVM_REG_5V5

EVM_ID_PWR

SDO_A

SCLK_AB

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

AGND

A0

1

A1

2

A2

3

VSS

4

SDA

5

SCL

6

WP

7

VCC

8

U4

BR24G32FVT-3AGE2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

GND

MP1

GND

MP2

GND

MP3

GND

MP4

J4

QTH-030-01-L-D-A

VBIAS

AGND

10uF

C1

10uF

C2

10uF

C3

2

1

3

S1

CAS-120TA

TP1

49.9

R15

49.9

R17

49.9

R16

SDO_B

SCLK_AB

CS_B

0

R10

DNP

EVM_ID_WP

EVM_ID_WP

CS_B

1

2

3

4

5

6

OPA836IDBVR

U6

V+

8

V-

4

OPA2836QDGKRQ1

U7C

AGND

16.0

R25

16.0

R27

300pF

C17

EVM_DVDD

AGND

0

R12

0

R11

49.9

R18

49.9

R20

49.9

R19

SDO_A

SCLK_AB

CS_A

AGND

AGND

SDO_B

CS_A

AVDD

OPA_VDD

OPA_VDD

OPA_VSS

100k

R7

100k

R9

1.00k

R23

1.00k

R24

1.00k

R29

1.00k

R30

AVDD

AGND

AGND

OPA_VSS

EVM_REG_5V5

EVM_DVDD

AGND

0

R22

0

R21

AGND

AVDD

0

R2

0

R8

0

R1

0

R6

1

2

3

JP4

JP3

0

R37

DNP

IN

1

EN

3

BYPASS

4

FB

5

OUT

6

2

GND

TPS79101DBVR

U1

IN

1

EN

3

BYPASS

4

FB

5

OUT

6

2

GND

TPS79101DBVR

U2

15pF

C19

15pF

C5

51.1k

R33

30.1k

R34

30.1k

R32

59.0k

R31

OPA_VDD

10V
10uF

C7

10V
10uF

C20

AGND

AGND

JP2

AGND

JP1

AGND

U3_AINM

U3_AVDD

U3_DVDD

U3_SCLK
U3_SDO
U3_CS

U5_AVDD

U5_DVDD

U5_SCLK
U5_SDO
U5_CS

U5_AINP

U5_AINM

AGND

U3_AVDD

U3_DVDD

U3_SCLK
U3_SDO
U3_CS

U3_AINP

U3_AINM

U5_AVDD

U5_DVDD

U5_SCLK
U5_SDO
U5_CS

U5_AINP

U5_AINM

AGND

AGND

U3_AINP

0

R39

DNP

10.0k

R26

10.0k

R28

0

R4

5

6

7

B

OPA2836QDGKRQ1

U7B

2

3

1

A

OPA2836QDGKRQ1

U7A

1

2

3

4

5

6

7

8

9

10

JP5

TSW-105-07-G-D

OPA_VDD

AGND

OPA_VSS

AVDD

0

R40

AINM

1.00k

R36

1.00k

R35

470

R41

EVM_REG_5V5

AGND

CS

4

SDO

3

SCLK

2

DVDD

1

GND

8

AVDD

7

AINP

6

AINM

5

ADS7042IDCUR

U3

AGND

100

R42

VBIAS

CS

1

SDO

2

SCLK

3

DVDD

4

GND

5

AVDD

6

AINP

7

AINM

8

ADS7042IRUGR

U8

DNP

AVDD

7

DVDD

1

CS

4

AINM

5

AINP

6

SCLK

2

SDO

3

GND

8

ADS7044IDCUR

U9

DNP

CS

1

SDO

2

SCLK

3

DVDD

4

GND

5

AVDD

6

AINP

7

AINM

8

ADS7057IRUGR

U5

1

2

3

4

5

J1

1

2

3

4

5

J2

1

2

3

4

5

J3

10nF

C18

100nF

C12

DNP

100nF

C22

100nF

C13

100nF

C10

10nF

C21

10nF

C14

1µF

C4

1µF

C6

1µF

C8

1µF

C9

1µF

C15

1µF

C16

Green

D1

100k

R5

301k

R3

AVDD/4

AGND

16.0

R14

16.0

R38

300pF

C11

Replace R43 and R44 with 100nF

capacitors when OPA_VSS ≠ AGND

0

R43

0

R44

100nF

C23

DNP

100nF

C24

DNP

1

3

2

4

8

OPA2320AIDGKR

U10A

7

5

6

4

8

OPA2320AIDGKR

U10B

AGND

100nF

C25

OPA_VDD

OPA_VDD

0

R45

DNP

AGND

AVDD/2

AVDD/4

VBIAS

AINM

AVDD/2

0

R13

EVM_DVDD

EVM_CAP

Figure 5-8. ADS704X-5XEVM Schematic

www.ti.com

Bill of Materials, Layout, and Schematic

SBAU382 – NOVEMBER 2021

Submit Document Feedback

ADS7042EVM-PDK, ADS7049-Q1EVM-PDK, and ADS7057EVM-PDK 

Evaluation Module

23

Copyright © 2021 Texas Instruments Incorporated

Содержание ADS7042EVM-PDK

Страница 1: ...tial input ADS7047 and the 14 bit 2 5 MSPS differential input ADS7057 Moreover unique EVM design enables evaluation of the entire family of ADS704x and ADS705x devices through minor modifications Finally this EVM platform eases device analysis using hardware software and computer connectivity through the universal serial bus USB interface This user s guide includes complete circuit descriptions sc...

Страница 2: ...pectral Analysis 16 4 5 Histogram Analysis 17 4 6 Updating EEPROM After ADC Replacement 17 5 Bill of Materials Layout and Schematic 19 5 1 Bill of Materials 19 5 2 Layout 21 5 3 Schematic 23 Trademarks LabVIEW is a trademark of National Instruments Microsoft and Windows are registered trademarks of Microsoft Corporation All trademarks are the property of their respective owners Table of Contents w...

Страница 3: ... Each ADS704X 5XEVM board includes the peripheral analog circuits and components required to extract optimum performance from the ADC Moreover each ADS704X 5XEVM includes two complete ADC signal chains one that supports a single ended input ADC see Section 2 1 1 and another that supports a differential input ADC see Section 2 1 2 Table 1 1 defines which ADCs are populated by default on each EVM Ta...

Страница 4: ...7046 n a Single ended X2QFN U8 ADS7047 ADS7049 Q1EVM PDK Differential X2QFN U5 ADS7052 n a Single ended X2QFN U8 ADS7054 n a Differential X2QFN U5 ADS7056 n a Single ended X2QFN U8 ADS7057 ADS7042EVM PDK ADS7057EVM PDK Differential X2QFN U5 ADS7029 Q1 n a Single ended VSSOP U3 ADS7039 Q1 n a Single ended VSSOP U3 ADS7049 Q1 ADS7049 Q1EVM PDK Single ended VSSOP U3 ADS704X 5XEVM PDK Overview www ti ...

Страница 5: ...ts of an inverting driver amplifier an RC circuit and two ADC footprints Figure 2 2 shows the single ended input path schematic 1 2 3 4 5 6 OPA836IDBVR U6 EVM_DVDD AGND 0 R12 0 R11 49 9 R18 49 9 R20 49 9 R19 SDO_A SCLK_AB CS_A AGND AGND AVDD OPA_VDD OPA_VSS 0 R37 DNP AGND JP1 AGND U3_AINM U3_AVDD U3_DVDD U3_SCLK U3_SDO U3_CS U3_AVDD U3_DVDD U3_SCLK U3_SDO U3_CS U3_AINP U3_AINM AGND U3_AINP 0 R40 A...

Страница 6: ... V 8 V 4 OPA2836QDGKRQ1 U7C AGND 16 0 R25 16 0 R27 300pF C17 1 00k R23 1 00k R24 1 00k R29 1 00k R30 AGND OPA_VSS EVM_DVDD AGND 0 R22 0 R21 AGND AVDD JP3 OPA_VDD AGND JP2 AGND U5_AVDD U5_DVDD U5_SCLK U5_SDO U5_CS U5_AINP U5_AINM AGND U5_AVDD U5_DVDD U5_SCLK U5_SDO U5_CS U5_AINP U5_AINM 5 6 7 B OPA2836QDGKRQ1 U7B 2 3 1 A OPA2836QDGKRQ1 U7A AVDD 7 DVDD 1 CS 4 AINM 5 AINP 6 SCLK 2 SDO 3 GND 8 ADS7044...

Страница 7: ...4 AGND AVDD 2 Figure 2 4 Power Tree on the ADS704X 5XEVM In Figure 2 4 the top LDO U1 has an adjustable output set by resistors R31 and R32 while the bottom LDO U2 has an adjustable output set by resistors R33 and R34 Modify these resistor values if a different OPA_VDD or AVDD voltage is desired Ensure that the input absolute and common mode voltage limitations for all components are within data s...

Страница 8: ...r over the USB There are three devices on the EVM with which the PHI communicates the two ADCs over SPI and the EEPROM over I2C The EEPROM comes preprogrammed with the information required to configure and initialize each ADC populated by default on the ADS704X 5XEVM Therefore communication with the EEPROM is only required if the user removes and replaces one of the default ADCs See Section 2 4 fo...

Страница 9: ... used with the PHI board to identify the specific ADCs populated on the EVM and enable the correct GUI settings The user does not need to modify or interact with this circuit during EVM operation As a result switch S1 is set by default to enable the EEPROM write protect and must not be altered unless the ADC is modified as per Section 2 1 1 or Section 2 1 2 Update the EEPROM when the ADC is replac...

Страница 10: ...he EVM GUI installer onto the local hard disk Depending on the antivirus settings an error message may appear or the installer exe file may be deleted As shown in Figure 3 1 accept the license agreements and follow the on screen instructions to complete the installation Figure 3 1 Software Installation and Prompts ADS704X 5XEVM Software Installation www ti com 10 ADS7042EVM PDK ADS7049 Q1EVM PDK a...

Страница 11: ...e screen as shown in Figure 3 2 Click Next to proceed Figure 3 2 Device Driver Installation www ti com ADS704X 5XEVM Software Installation SBAU382 NOVEMBER 2021 Submit Document Feedback ADS7042EVM PDK ADS7049 Q1EVM PDK and ADS7057EVM PDK Evaluation Module 11 Copyright 2021 Texas Instruments Incorporated ...

Страница 12: ... as shown in Figure 3 3 if not already installed Figure 3 3 LabVIEW Run Time Engine Installation ADS704X 5XEVM Software Installation www ti com 12 ADS7042EVM PDK ADS7049 Q1EVM PDK and ADS7057EVM PDK Evaluation Module SBAU382 NOVEMBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 13: ... Figure 4 1 illuminates green to indicate that AVDD is being supplied to the EVM 4 Connect the signal generator The input range varies for the different ADCs but is typically 0 V to AVDD for single ended devices or AVDD to AVDD for differential devices Check the specific ADC data sheet for more information about allowable input ranges In any case adjust the input signal to just below full scale ra...

Страница 14: ... and ADS7047 are included on the EVM represented by Figure 4 2 Figure 4 2 ADS704X 5XEVM GUI Overview The EVM global controls are located on the left hand side of the GUI and are as follows Active Device also shown in the upper left corner of the GUI VREF only valid if AVDD is modified from the default value as per Section 2 2 otherwise leave this value set to 3 3 V Samples SCLK Frequency Sampling ...

Страница 15: ...waveform is plotted by Samples on the x axis against Codes and Voltage on the left and right y axes respectively Voltage is relative to the specified reference voltage which for all devices in Table 1 2 is just the AVDD voltage Switching Pages to any of the analysis tools described in the subsequent sections causes calculations to be performed on the same set of data Figure 4 3 Time Domain Display...

Страница 16: ... to resolve the frequency components of all ADCs included in Table 1 2 The None option corresponds to not using a window or using a rectangular window and is not recommended Figure 4 4 Spectral Analysis in the ADS704X 5XEVM GUI As noted in step 4 a in Section 4 1 Texas Instruments offers the PSIEVM as a precision signal generator if such a source is otherwise unavailable to the user The PSIEVM can...

Страница 17: ...ate the EEPROM so the GUI reflects the newly installed devices on the EVM Follow these steps to update the EEPROM from the ADS704X 5XEVM GUI 1 Set switch S1 to write enable by pushing the switch closest to the WR_EN silkscreen text see Figure 2 1 2 Navigate to Tools Load EEPROM in the menu at the top left of the GUI 3 In the pop up window illustrated in Figure 4 6 select the appropriate device for...

Страница 18: ...Figure 4 7 GUI Main Screen After EEPROM is Updated Successfully EVM Operation www ti com 18 ADS7042EVM PDK ADS7049 Q1EVM PDK and ADS7057EVM PDK Evaluation Module SBAU382 NOVEMBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 19: ...21 3 0 01uF CAP CERM 0 01 uF 50 V 5 X7R 0603 0603 C0603C103J5R ACTU Kemet D1 1 Green LED Green SMD 1 6x0 8x0 8mm LTST C190GKT Lite On H1 H2 H3 H4 4 MACHINE SCREW PAN PHILLIPS 4 40 Machine Screw 4 40 1 4 inch PMSSS 440 0025 PH B F Fastener Supply H5 H6 2 ROUND STANDOFF M3 STEEL 5MM ROUND STANDOFF M3 STEEL 5MM 9774050360R Wurth Elektronik J1 J2 J3 3 SMA Straight Jack Gold 50 Ohm TH SMA Straight Jack...

Страница 20: ...S Ultra Low Power Ultra Small Size SAR ADC With SPI Interface VSSOP 8 DCU0008A ADS7042IDCUR Texas Instruments U4 1 I2C BUS EEPROM 2 Wire TSSOP B8 TSSOP 8 BR24G32FVT 3 AGE2 Rohm U52 1 Ultra Low Power Ultra Small Size 14 Bit High Speed SAR ADC RUG0008A X2QFN 8 RUG0008A ADS7057IRUG R Texas Instruments U6 1 Very Low Power Rail to Rail Out Negative Rail In VFB Operational Amplifier 2 5 to 5 5 V 40 to 1...

Страница 21: ...he ADS704X 5XEVM Figure 5 1 Composite PCB Layout www ti com Bill of Materials Layout and Schematic SBAU382 NOVEMBER 2021 Submit Document Feedback ADS7042EVM PDK ADS7049 Q1EVM PDK and ADS7057EVM PDK Evaluation Module 21 Copyright 2021 Texas Instruments Incorporated ...

Страница 22: ... Inner Ground Plane 2 Figure 5 6 Bottom Layer Figure 5 7 Bottom Overlay Bill of Materials Layout and Schematic www ti com 22 ADS7042EVM PDK ADS7049 Q1EVM PDK and ADS7057EVM PDK Evaluation Module SBAU382 NOVEMBER 2021 Submit Document Feedback Copyright 2021 Texas Instruments Incorporated ...

Страница 23: ...R33 30 1k R34 30 1k R32 59 0k R31 OPA_VDD 10V 10uF C7 10V 10uF C20 AGND AGND JP2 AGND JP1 AGND U3_AINM U3_AVDD U3_DVDD U3_SCLK U3_SDO U3_CS U5_AVDD U5_DVDD U5_SCLK U5_SDO U5_CS U5_AINP U5_AINM AGND U3_AVDD U3_DVDD U3_SCLK U3_SDO U3_CS U3_AINP U3_AINM U5_AVDD U5_DVDD U5_SCLK U5_SDO U5_CS U5_AINP U5_AINM AGND AGND U3_AINP 0 R39 DNP 10 0k R26 10 0k R28 0 R4 5 6 7 B OPA2836QDGKRQ1 U7B 2 3 1 A OPA2836Q...

Страница 24: ...other than TI b the nonconformity resulted from User s design specifications or instructions for such EVMs or improper system design or c User has not paid on time Testing and other quality control techniques are used to the extent TI deems necessary TI does not test all parameters of each EVM User s claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects...

Страница 25: ... These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation...

Страница 26: ...y for convenience and should be verified by User 1 Use EVMs in a shielded room or any other test facility as defined in the notification 173 issued by Ministry of Internal Affairs and Communications on March 28 2006 based on Sub section 1 1 of Article 6 of the Ministry s Rule for Enforcement of Radio Law of Japan 2 Use EVMs only after User obtains the license of Test Radio Station as provided in R...

Страница 27: ... any interfaces electronic and or mechanical between the EVM and any human body are designed with suitable isolation and means to safely limit accessible leakage currents to minimize the risk of electrical shock hazard User assumes all responsibility and liability for any improper or unsafe handling or use of the EVM by User or its employees affiliates contractors or designees 4 4 User assumes all...

Страница 28: ...OR DAMAGES ARE CLAIMED THE EXISTENCE OF MORE THAN ONE CLAIM SHALL NOT ENLARGE OR EXTEND THIS LIMIT 9 Return Policy Except as otherwise provided TI does not offer any refunds returns or exchanges Furthermore no return of EVM s will be accepted if the package has been opened and no return of the EVM s will be accepted if they are damaged or otherwise not in a resalable condition If User feels it has...

Страница 29: ...o change without notice TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource Other reproduction and display of these resources is prohibited No license is granted to any other TI intellectual property right or to any third party intellectual property right TI disclaims responsibility for and you will fully indemn...

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