Quick Start Guide
2.2.2
ADS54J40EVM Setup
Next, setup the ADS54J40EVM using the following:
1. Connect the included 5-V power supply cable to connector J9 of the EVM. Connect the red wire to
+5 VDC ±0.3 VDC of a power supply rated for at least 3 A. Connect the black wire to GND of the
power supply.
2. Turn on the 5-VDC power supply. The power draw should be around 0.66 A. When the board is
configured, it will draw approximately 1.35 A.
3. Connect the included mini-USB cable to the USB connector J8, located on the backside of the board.
4. Set an analog input signal generator for 170 MHz, and about +15 dBm of power.
5. Place a narrow pass-band bandpass filter at the output of the signal generator to remove noise and
harmonics.
6. Connect the output of the filter to SMA connector AINP (J2) of the EVM.
2.3
Software Setup Procedure
The software can be opened and configured once the hardware is properly setup.
2.3.1
ADS54J40 GUI Configuration
1. Open the ADS54Jxx EVM GUI by going to
Start Menu
→
All Programs
→
Texas Instruments ADCs
→
ADS54Jxx EVM GUI
.
2. Verify that the green
USB Status
indicator is lit in the top right corner of the GUI. If it is not lit, click the
Reconnect USB
button and check the
USB Status
indicator again. If it is still not lit, then verify the EVM
is connected to the computer through the included mini-USB cable.
3. Click on the
Low Level View
tab then click the
Load Config
button.
4. Navigate to
C:\Program Files(86)\Texas Instruments\ADS54Jxx EVM GUI\Configuration Files
, select
the file called
LMK_Config_Onboard_983p04_MSPS.cfg
, then click
OK
. This programs the LMK04828
to provide a 983.04 MHz clock to the ADC.
5. Verify that the LMK04828 phase lock loop (PLL) is locked by checking that the
PLL2 LOCKED
LED
(D2) is lit.
6. Once the LMK04828 PLL is locked, press SW1 (
ADC RESET
) to provide a hardware reset to the ADC.
This switch is located in the middle of the EVM.
7. In the
Low Level View
tab, click
Load Config
. Select the file called
ADS54J40_LMF_8224.cfg
and click
OK
. The ADS54J40EVM is now configured for no decimation and 8 JESD204B lanes.
6
ADS54J40EVM
SLAU652A – October 2015 – Revised January 2016
Copyright © 2015–2016, Texas Instruments Incorporated