Modulator Clock
1-4
Figure 1−2 shows a block diagram of the configuration.
Figure 1−2. Block Diagram
Gain = 1
Gain = 1
Gain = 1
Gain = 1
5-V
Reference
8 V − 40 V
REF+
V
MID
=
(REF+) + (REF−)
2
REF−
V
CM
To ADC
To Analog Input
1.6
Modulator Clock
The ADS1625 and ADS1626 partition the modulator clock as part of the analog
section. Two options are available. The clock can either be supplied via the
onboard 40-MHz oscillator, or externally via J5. This option is useful for
low-jitter coherent sampling during testing.
Table 1−4. Modulator Clock Settings
Factory-Set Condition
Reference
Designator
Description
1−2
Clock
.
40 MHz
2−3
Clock
.
J5
W7
Modulator Clock Source
Installed
Not installed
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