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4

Power Supplies

5

Using the EVM

5.1

Development/Evaluation Board

5.1.1

EVM and TSW1100 Capture Board

Power Supplies

The ADS1610EVM arrives with CS, HOST_RD, HOST_A2, and HOST_A3 signals set LOW. This enables
the ADS1610 and at power up allows the device to start converting. The modes pins (M0 and M1) are
factory set to enable a data rate of 10 MHz.

The ADS1610EVM board requires various power sources for operation.

A dual

±

7-Vdc supply for best performance of the analog front end and reference generation circuitry.

These voltages can be applied at J11.

Two +5-Vdc supplies for the ADS1610 analog supply and clock supply. Apply 5 V at J12 and J13.

A 3-Vdc supply for digital section of the board (A/D + address d buffers). Apply 3 V to
J1.

The ADS1610EVM serves two purposes. It functions as an evaluation/development board and a reference
design.

The two common methods used to evaluate the ADS1610EVM’s performance are:

1. EVM used as a stand-alone system. The user is responsible for capturing and analyzing the data,

typically via a logic analyzer and analysis software (LABView, MATLAB, etc.).

2. EVM used with TI’s TSW1100 data capture board solution:

http://focus.ti.com/docs/toolsw/folders/print/tsw1100.html

The user’s guide for the data capture board (

SLAU164

provides detailed information and setup

instructions.

The ADS1610EVM mates with the TSW1100 board via J2. Two data ports are available on the data
capture board; the reference designators are J1 and J2.

Figure 2

shows the ADS1610 plugged into the

TSW1100 board.

Figure 2. TSW1100 and ADS1610EVM Setup

8

ADS1610EVM

SLAU180A – May 2006 – Revised August 2006

Submit Documentation Feedback

Содержание ADS1610EVM

Страница 1: ...ayout and Schematic 17 List of Figures 1 Input Circuitry 3 2 TSW1100 and ADS1610EVM Setup 8 3 TSW1100 Screen Shot 9 4 Test Results With a 100 kHz Input Frequency 10 5 Test Results With a 250 kHz Input 10 6 Test Results With a 500 kHz Input 11 7 Test Results With a 1 MHz Input 11 8 Test Results With a 2 MHz Input 12 B 1 Top Layer Layer 1 17 B 2 Split Ground Plane Layer 2 17 B 3 Split Power Plane La...

Страница 2: ...an external resistor allowing for reduction at lower operating speeds With its outstanding high speed performance the ADS1610 is well suited for demanding applications in data acquisition scientific instruments test and measurement equipment and communications The ADS1610EVM is a stand alone full featured system that offers data sheet performance Additionally the EVM conforms to a common electrica...

Страница 3: ...oltage for the input driver THS4503 The three reference voltages can be adjusted using the trim potentiometers R37 R38 and R40 The reference voltage source for the onboard reference generation circuitry is selectable If W1 jumper position is across pins 1 and 2 then AVDD1 is selected When the jumper is placed across pins 2 and 3 the REF02 is selected as the source The ADS1610EVM leaves the factory...

Страница 4: ...d from a 50 Ω source then be sure to reduce the clock amplitude to half To switch from the onboard oscillator to the user clock applied at J4 change the position of jumper of W3 from pins 1 2 to 2 3 The performance of the ADS1610 is sensitive to clock jitter see the data sheet for the requirements Table 2 Jumper Setting Reference 1 2 2 3 Description Designator W1 Installed 1 Not installed Set volt...

Страница 5: ...his allows the user to manually reset the LED and reset the ADS1610 The ADS1610 can be asynchronously reset when the SYNC pin is driven low In reset all the digital circuits are cleared the data bus is LOW and DRDY is HIGH The ADS1610 can be reset in two ways using an manual reset via SW1 or by programming from the host system If W20 pins 1 2 are shorted the SYNC signal must be generated by the ho...

Страница 6: ...S1610EVM directly to the TSW1100 data capture board see SLAU164 from Texas Instruments The application section of this user s guide explains how an ADS1610 can be evaluated using the TSW1100 and ADS1610EVM The pin assignments and function of each of the pins on J2 and J18 are given in Table 6 and Table 7 Table 6 Assignment and Function at J18 Description Signal Connector Pin Connector Pin Descript...

Страница 7: ...nd Ground J2 29 J2 30 D12 Buffered data bit 12 Ground Ground J2 31 J2 32 D13 Buffered data bit 13 Ground Ground J2 33 J2 34 D14 Buffered data bit 14 Ground Ground J2 35 J2 36 D15 Buffered data bit 15 Ground Ground J2 37 J2 38 N C Ground Ground J2 39 J2 40 DRDY_OUT The ADC is controlled by the signals that originate from J10 P10 The assignment and function of each pin is given in Table 8 Table 8 As...

Страница 8: ...ecoder buffers Apply 3 V to J1 The ADS1610EVM serves two purposes It functions as an evaluation development board and a reference design The two common methods used to evaluate the ADS1610EVM s performance are 1 EVM used as a stand alone system The user is responsible for capturing and analyzing the data typically via a logic analyzer and analysis software LABView MATLAB etc 2 EVM used with TI s T...

Страница 9: ...from the PLOT pulldown menu 7 Set FFT Window Type to NONE 8 Click Acquire Data After data is captured and processed check to see if dBFS field reads approximately 6 dB If not adjust the signal amplitude and then click Acquire Data Do this until dBFS is approximately 6dB 9 Once the signal amplitude is 6 dB less FS select Hanning from the FFT Window Type 10 Notice SFDR THD and SNR The results should...

Страница 10: ...www ti com Using the EVM Figure 4 Test Results With a 100 kHz Input Frequency Figure 5 Test Results With a 250 kHz Input 10 ADS1610EVM SLAU180A May 2006 Revised August 2006 Submit Documentation Feedback ...

Страница 11: ...ut At higher input frequencies SFDR is sensitive to the quality of the modulator clock Therefore if using an external clock source be sure it is a high quality low jitter clock source that is used to drive the modulator clock SLAU180A May 2006 Revised August 2006 ADS1610EVM 11 Submit Documentation Feedback ...

Страница 12: ...hird party development kits 3 Design and build your own custom interface The ADS1610EVM is a reference design for the ADS1610 It provides a real world model for the hardware engineer tasked to integrate the ADS1610 onto the user system board To achieve the best performance the layout used on the ADS1610EVM should be replicated as much as possible The layout and component placement of the reference...

Страница 13: ...at 972 644 5580 When ordering identify this booklet by its title and literature number Updated documents can also be obtained through The TI Web site at www ti com Data Sheets Literature Number ADS1610 SBAS344 REF02 SBVS003 REG101 SBVS026 SN74AHC1G04 SCLS318 SN74AHC1G32 SCLS317 SN74AHC1G86 SCLS323 SN74AHC32 SCLS247 SN74AHC74 SCLS255 SN74AHC541 SCLS261 THS4031 SLOS224 THS4503 SLOS352 SLAU180A May 2...

Страница 14: ...3 Yageo America 9T06031A1241FBHFT RES 1 24 kΩ 1 10W 1 SMD 1 2 15K R62 0603 Yageo America 9T06031A2151FBHFT RES 2 15 kΩ 1 10W 1 SMD 3 5K R37 R38 R40 Bourns_3224W Bourns Inc 3224W 1 502E TRIMPOT 5 kΩ 4mm TOP ADJ SMD 2 7 50K R47 R61 0603 Yageo America 9T06031A7501FBHFT RES 7 50 kΩ 1 SMD 6 10K R1 R2 R42 R43 0603 Yageo America 9T06031A1002FBHFT RES 10 0 kΩ 1 10W 1 SMD R45 R139 1 10K RP14 CTS_742_8RES C...

Страница 15: ...1UA 3 3 IC LDO Regulator 3 3V 100 mA 8SOP 1 U21 DBV R PDSO G5 Texas Instruments SN74AHC1G04DBVR IC single inverter gate SOT23 5 1 U15 DBV R PDSO G5 Texas Instruments SN74AHC1G32DBVR IC SGL 2IN POS OR Gate SOT23 5 2 U16 U17 DBV R PDSO G5 Texas Instruments SN74AHC1G86DBVR IC SGL 2IN EX OR Gate SOT23 5 1 U22 14 TSSOP PW Texas Instruments SN74AHC32PWR IC quad 2 IN POS OR Gate 14TSSOP 1 U13 14 TSSOP PW...

Страница 16: ...switch 1 SW2 EVQ PJ Panasonic EVQ PJU04K Switch LT TOUCH 6x3 5 240GF SMD 1 LED1 LED 1206 Chicago Miniature CMD15 21VRC TR8 Red LED Lamp Co 1 X1 OSC_CTS_SMT Vapley Fisher VF1SH 1 60 0MHz or Oscillator 60MHz Low Jitter Corporation VF900538 60 000 MHz 1 Q1 SOT23 3 Infineon SMBT3904E6327 TRANS NPN 40V SOT 23 Bill of Materials 16 SLAU180A May 2006 Revised August 2006 Submit Documentation Feedback ...

Страница 17: ...matic B 1 Layout Appendix B This appendix contains the EVM layout and schematic Figure B 1 Top Layer Layer 1 Figure B 2 Split Ground Plane Layer 2 SLAU180A May 2006 Revised August 2006 Layout and Schematic 17 Submit Documentation Feedback ...

Страница 18: ...www ti com Layout Figure B 3 Split Power Plane Layer 3 Figure B 4 Split Power Plane Layer 4 18 Layout and Schematic SLAU180A May 2006 Revised August 2006 Submit Documentation Feedback ...

Страница 19: ...ic Schematic Figure B 5 Split Ground Plane Layer 5 Figure B 6 Bottom Layer Layer 6 The ADS1610EVM schematic is appended to this page SLAU180A May 2006 Revised August 2006 Layout and Schematic 19 Submit Documentation Feedback ...

Страница 20: ...HEET OF FILE SIZE DATE REV 18 Aug 2006 Drawn By Engineer Revision History REV ECN Number Approved Block Diagram sch DOCUMENTCONTROL ADS1610 Sch Data bus buffers Sch Interface Sch Diff Analog Input Sch Voltage Reference Sch Power Sch ADS1610 Block Diagram 1 7 A 6455110 Joe Purvis Joe Purvis ...

Страница 21: ...h 3 Sh 3 Sh 3 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 Sh 2 AGND1 AGND1 NOTES 1 DO NOT INSTALL AGND1 AGND1 AGND1 AGND1 AGND1 AGND1 DGND1 DGND1 AGND1 AGND1 1 TP1 ADS1610 2 7 A 6455110 Joe Purvis Joe Purvis 1 8 2 7 3 6 4 5 RP1 33R AGND 1 AVDD 2 AGND 3 AINN 4 AINP 5 AGND 6 AVDD 7 RBIAS 8 AGND 9 AVDD 10 AGND 11 AVDD 12 NC 13 M0 14 M1 15 NC 16 PD 17 DVDD 18 D...

Страница 22: ...4 B15 OTR DRDY B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 OTR DRDY DGND1 C34 10uF C35 10uF C36 10uF Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 Sh 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 J18 40 PIN HEADER D_RDY RANGE 1 3 5 7 9 11 13 17 19 2 4 6 8 10 12 14 16 18 20 15 J10 HEA...

Страница 23: ...4 DGND1 VCC 14 GND 7 U13C SN74AHC74 3 1 2 SOT23 3 1 BASE 2 EMITTER 3 COLLECTOR Qx GND 7 VCC 14 U22E SN74AHC32 GND 3 Vcc 5 U15B SN74AHC1G32 GND 3 Vcc 5 U17B SN74AHC1G86 1 2 4 A B Y U17A SN74AHC1G86 C100 0 1uF C101 0 1uF C99 0 1uF C108 0 1uF C109 0 1uF C194 0 1uF 1 TP7 1 TP6 1 1 3 3 5 5 7 7 9 9 11 11 13 13 15 15 16 16 14 14 12 12 10 10 8 8 6 6 4 4 2 2 SW1 DIP_SWITCH_8POS 1 16 2 15 3 14 4 13 5 9 12 6...

Страница 24: ... 12R4 C254 100pF C255 100pF CML CML VINM VINM R67 12R4 C253 100pF C21 10uF C237 47pF C246 1uF R75 787R R66 56 2R 1 2 3 4 5 J4 AGND1 R73 374R R74 402R C238 47pF R77 787R R76 374R Sh 5 Note 1 R84 56 2R C102 10uF C186 1uF 1 2 3 4 5 J41 7VA AGND1 AGND1 AGND1 AGND1 AGND1 AGND1 AGND1 AGND1 Diff Analog Input 5 7 A 6455110 Joe Purvis Joe Purvis In 1 In 8 Vocm 2 Vout 4 Vout 5 U12A THS4503 Vs 6 Vs 3 PD 7 U1...

Страница 25: ...67 NI C171 NI C223 NI C68 NI REFM REFP REFP REFM C227 10uF C69 1uF Sh 1 Sh 1 AGND1 CML CML 7VA AGND1 AGND1 AGND1 AGND1 AGND1 AGND1 AGND1 R62 2 15K R40 5K C71 NI C224 10uF C16 NI C15 NI C17 NI R22 332R R56 100R C175 0 1uF C150 NI R23 332R R55 0 AGND1 7VA AGND1 7VA C176 0 1uF C152 NI AGND1 C177 NI AGND1 C72 NI AVDD1 1 TP3 1 TP2 1 TP4 Voltage Reference 6 7 A 6455110 Joe Purvis Joe Purvis 2 6 3 U10A T...

Страница 26: ...4 1uF AGND1 DGND1 ADC OUTPUT DRIVER SUPPLY ADC COMP SUPPLY 3 0V C77 0 1uF AVDD1 C24 10uF C124 0 001uF C206 1uF AGND1 C256 47uF C76 1uF C78 0 1uF AVDD1 C125 001uF C207 1uF AVDD1 C126 001uF C208 1uF AGND1 AGND1 AVDD2 AVDD3 C82 0 1uF AVDD1 C127 001uF C209 1uF ADC ANALOG SUPPLY 5V AGND1 C260 47uF C85 1uF C261 47uF C86 1uF 7VA AGND1 AGND1 C87 1uF C129 001uF 7VA 7VA ANALOG SUPPLY REF CIRCUIT 7V 1 2 J1 1...

Страница 27: ...product This notice contains important safety information about temperatures and voltages For additional information on TI s environmental and or safety programs please contact the TI application engineer or visit www ti com esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine process or combination in which such TI product...

Страница 28: ...siness practice TI is not responsible or liable for any such statements TI products are not authorized for use in safety critical applications such as life support where a failure of the TI product would reasonably be expected to cause severe personal injury or death unless officers of the parties have executed an agreement specifically governing such use Buyers represent that they have all necess...

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