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Analog Interface
summarizes the pinouts for analog interface header J8.
Table 1. J8: Analog Interface Header Pinout
Pin Number
Signal
Description
J8.1
A0N
AINN, ADS1259, through switch S2 and low-pass
filter, R1-2, C1-3
J8.2
A0P
AINP, ADS1259, through switch S2 and low-pass
filter, R1-2, C1-3
J8.3
A1N
INN1, PGA280, through R7
J8.4
A1P
INP1, PGA280, through R6
J8.5
A1N
INN2, PGA280, through R5
J8.6
A1P
INP2, PGA280, through R4
J8.9-13 (odd)
AGND
Analog ground connections
J8.15
VCOM
VOCM, PGA280, via switch S3 and R3
J8.17-19 (odd)
AGND
Analog ground connections
J8.18
REFN
External reference source input (– side of
differential input)
J8.20
REFP
External reference source input (+ side of
differential input)
J8.10-16 (even)
Unused
—
The output pins of the PGA280 (VOP and VON) can be accessed through TP11 and TP12, but there is no
connection to the analog interface J8.
shows TP11 and TP12.
Figure 1. Test Points TP11 and TP12
The input of the ADS1259 is selectable through switch S2. From settings left-to-right, this three-way switch
selects the ADC input from the AINP or AINN inputs from the analog interface header, the VOP and VON
outputs of the PGA280, or allows for the self calibration inputs in combination with jumper J15.
5
SBAU163A – March 2010 – Revised April 2010
ADS1259EVM, ADS1259EVM-PDK
Copyright © 2010, Texas Instruments Incorporated