4
SLAU701A – May 2017 – Revised January 2018
Copyright © 2017–2018, Texas Instruments Incorporated
Introduction
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Chapter 1
SLAU701A – May 2017 – Revised January 2018
Introduction
The ADCxxDJxx00EVM is an evaluation board used to evaluate the ADCxxDJxx00 family (ADC08DJ3200,
ADC12DJ2700 and ADC12DJ3200) of analog-to-digital converters (ADC) from Texas Instruments. The
ADCxxDJxx00 devices are dual-channel, 8 or 12-bit ADCs, capable of operating at sampling rates up to
3.2 Giga-samples per second (GSPS) in dual channel mode or 6.4 GSPS in single channel mode. The
ADCxxDJxx00EVM device output data is transmitted over a standard JESD204B high-speed serial
interface. This evaluation board also includes the following important features:
•
Transformer-coupled signal input network allowing a single-ended signal source from 500 kHz to
9 GHz
•
The LMX2582 clock synthesizer generates the ADC sampling clock
•
The LMK04828 and LMX2582 onboard system clock generator generates SYSREF and FPGA
reference clocks for the high-speed serial interface
•
Transformer-coupled clock input network to test the ADC performance with an external low-noise clock
source
•
LM95233 temperature sensor
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High-speed serial data output over a High Pin Count FMC+ interface connector
NOTE:
To improve signal routing quality, serial lane polarity is inverted with respect to the standard
FMC VITA-57 signal mapping. Signal mapping and polarity is shown in
•
Device register programming through USB connector and FTDI USB-to-SPI bus translator