TPMC682 User Manual Issue 1.1
Page 19 of 36
4.2.12 FIFO Threshold Register 2 (FTHR2; 0x30)
Bit
Symbol
Description
Access
Reset
Value
31..10
-
Reserved (0 for reads)
-
0
9..0
FIFO_FTR2
Threshold of FIFO 2 for setting of FIFO_STATUS2
R/W
0x040
Figure 4-14: FIFO Threshold Register 2 (FTHR2)
4.2.13 FIFO Threshold Register 1 (FTHR1; 0x34)
Bit
Symbol
Description
Access
Reset
Value
31..10
-
Reserved (0 for reads)
-
0
9..0
FIFO_FTR1
Threshold of FIFO 1 for setting of FIFO_STATUS1
R/W
0x040
Figure 4-15: FIFO Threshold Register 1 (FTHR1)
4.2.14 FIFO Threshold Register 0 (FTHR0; 0x38)
Bit
Symbol
Description
Access
Reset
Value
31..10
-
Reserved (0 for reads)
-
0
9..0
FIFO_FTR0
Threshold of FIFO 0 for setting of FIFO_STATUS0
R/W
0x040
Figure 4-16: FIFO Threshold Register 0 (FTHR0)
The threshold values should be greater than ‘0’, for proper function.